x86: c_p_a() fix: reorder TLB / cache flushes to follow Intel recommendation

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Intel recommends to first flush the TLBs and then the caches
on caching attribute changes. c_p_a() previously did it the
other way round. Reorder that.

The procedure is still not fully compliant to the Intel documentation
because Intel recommends a all CPU synchronization step between
the TLB flushes and the cache flushes.

However on all new Intel CPUs this is now meaningless anyways
because they support Self-Snoop and can skip the cache flush
step anyway.

[ mingo@elte.hu: decoupled from clflush and ported it to x86.git ]

Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

...

This commit is contained in:

Andi Kleen 2008-01-30 13:33:52 +01:00 • committed by Ingo Molnar

parent 6ba9b7d8f0

commit 3c86882341

2 changed files with 8 additions and 7 deletions

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12

arch/x86/mm/pageattr_32.c

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3

arch/x86/mm/pageattr_64.c

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