drm/i915: Power Context register is only available for gen4 mobiles

Browse source

The ability to save the hardware context upon powering down the render
clock through PWRCTXA is only available on a couple of gen4 chipsets.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

...

This commit is contained in:

Chris Wilson 2010-12-05 16:45:02 +00:00

parent 88f23b8fa3

commit 3c8cdf9b60

1 changed files with 1 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

2

drivers/gpu/drm/i915/intel_display.c

View file