pinctrl: tegra: Add MIPI pad control

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This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.

Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.

The register is not yet documented in the TRM, here is
the description:

70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
	[31:02] RESERVED
	[01:01] DSIB_MODE       [CSI=0,DSIB=1]
	[00:00] RESERVED

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

...

This commit is contained in:

Sean Paul 2014-09-09 15:58:45 -04:00 • committed by Linus Walleij

parent 02b837ffe0

commit 3ccc11f6b8

2 changed files with 78 additions and 3 deletions

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14

Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt

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67

drivers/pinctrl/pinctrl-tegra124.c

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