PCI: xilinx: Clear interrupt register for invalid interrupt

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The interrupt decode register is not being cleared if an invalid interrupt
arises.  Clear the decode register in this case.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

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Bharat Kumar Gogada 2016-09-01 15:44:42 +05:30 • committed by Bjorn Helgaas

parent b584fa1fde

commit 3cd049ab9e

1 changed files with 3 additions and 2 deletions

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drivers/pci/host/pcie-xilinx.c

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