KVM: arm64: GICv3: Handle LR overflow when EOImode==0

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Now that we can identify interrupts that have not made it into the LRs,
it becomes relatively easy to use EOIcount to walk the overflow list.

What is a bit odd is that we compute a fake LR for the original
state of the interrupt, clear the active bit, and feed into the existing
logic for processing. In a way, this is what would have happened if
the interrupt was in an LR.

Tested-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Mark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-28-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>

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Marc Zyngier 2025-11-20 17:25:17 +00:00 • committed by Oliver Upton

parent a69e2d6f89

commit 3cfd59f81e

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arch/arm64/kvm/vgic/vgic-v3.c

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