ARM: cache-l2x0: make better use of background cache handling

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There's no point having the hardware support background operations
if we issue a cache operation, and then wait for it to complete
before calculating the address of the next operation.  We gain no
advantage in the cache controller stalling the bus until completion.

What we should be doing is using the 'wait' time productively by
calculating the address of the next operation, and only then waiting
for the previous operation to complete.  This means that cache
operations can occur in parallel with the CPU calculating the next
address.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>

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Russell King 2009-11-19 11:41:09 +00:00

parent 0eb948dd7f

commit 3d1074349b

1 changed files with 23 additions and 11 deletions

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arch/arm/mm/cache-l2x0.c

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