drm/msm/a6xx: Add support for using system cache on MMU500 based targets

GPU targets with an MMU-500 attached have a slightly different process for
enabling system cache. Use the compatible string on the IOMMU phandle
to see if an MMU-500 is attached and modify the programming sequence
accordingly.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Jordan Crouse 2020-11-25 12:30:16 +05:30 • committed by Rob Clark
commit 3d247123b5
2 changed files with 37 additions and 10 deletions