drm/xe: add GSCCS irq support

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The GSCCS has its own enable and mask registers. The interrupt identity
for the GSCCS shows OTHER_CLASS instance 6.

Bspec: 54029, 54030
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230817201831.1583172-4-daniele.ceraolospurio@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Daniele Ceraolo Spurio 2023-08-17 13:18:27 -07:00 • committed by Rodrigo Vivi

parent 296549107e

commit 3d2b5d4e28

2 changed files with 20 additions and 7 deletions

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2

drivers/gpu/drm/xe/regs/xe_gt_regs.h

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25

drivers/gpu/drm/xe/xe_irq.c

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