drm/i915/mst: use max link not sink lane count

Browse source

The source might not support as many lanes as the sink, or the link
training might have failed at higher lane counts. Take these into
account.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/cf59530acafaf9258fb643d321ad251b44f34e29.1491485983.git.jani.nikula@intel.com

...

This commit is contained in:

Jani Nikula 2017-04-06 16:44:14 +03:00

parent 540b0b7fe9

commit 3d65a735d8

3 changed files with 4 additions and 3 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

2

drivers/gpu/drm/i915/intel_dp.c

View file

4

drivers/gpu/drm/i915/intel_dp_mst.c

View file

1

drivers/gpu/drm/i915/intel_drv.h

View file