spi: meson-spicc: add a linear clock divider support

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The SPICC controller in Meson-AXG SoC is capable of using
a linear clock divider to reach a much fine tuned range of clocks,
while the old controller only use a power of two clock divider,
result at a more coarse clock range.

Also convert the clock registration into Common Clock Framework.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20200312133131.26430-4-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Sunny Luo 2020-03-12 14:31:25 +01:00 • committed by Mark Brown

parent a6cda1f905

commit 3e0cf4d3fc

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2 changed files with 165 additions and 40 deletions

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1

drivers/spi/Kconfig

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204

drivers/spi/spi-meson-spicc.c

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