riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node

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Add PLL clocks input from PLL clocks driver in SYSCRG node.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Xingyu Wu 2023-07-17 10:30:40 +08:00 • committed by Conor Dooley

parent 3fcbcfc496

commit 3e6670a28b

1 changed files with 6 additions and 2 deletions

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arch/riscv/boot/dts/starfive/jh7110.dtsi

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