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ARM: davinci: da850: use clk->set_parent for async3
The da850 family of processors has an async3 clock domain that can be muxed to either pll0_sysclk2 or pll1_sysclk2. Now that the davinci clocks have a set_parent callback, we can use this to control the async3 mux instead of a stand-alone function. This adds a new async3_clk and sets the appropriate child clocks. The default is use to pll1_sysclk2 since it is not affected by processor frequency scaling. Signed-off-by: David Lechner <david@lechnology.com> [nsekhar@ti.com: drop unnecessary comment] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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