clk: tegra: Changes for v5.14-rc1

This contains a few fixes across the board and adds stubs to allow certain drivers to be compile-tested. One other notable change added here is that clock enabling no longer deasserts the reset. Drivers are now supposed to do that explicitly because doing it implicitly can get in the way of certain power-up sequences. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmDDiqITHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zofXiEACP5ggAm/THYcUZhR7RpRRgSh9MVek/ JOX/JTnD/0rqbTwpG0IO0+UeWrMzGeaj2w94hxVr5YT8Nf+23L+gMj8l4vYDKLG6 HEdbl9JWqeRNmrz/wdliGOPiLQ8kioMj7L7mPLR5k37BNdQFQQoQZ/+XD43Thwky AEKpxoGvoc1H3ZsDrnTnilsf51Vuia3rb38KlEPy25SNdOPIFThAiEgiYB1vpeT6 WnrA2Glnqi+6ZxVCJJOre+1rUSkUb7MDJy91GDGWt5XJDCpH4ioWz3kJfaZfD2F8 uaaTlOZIZxq/MwoMn4qDJpmbqCAonoMRDW1nA1hIiDfQBxgqBNxScK5jIVhxOXZi W3lAhReHTMLZ0AAsu0LL6RKpq1YHn7wjgu7aEZk541keYHSd7KNbDmk/5DXRoGaR SuCiDb75VUWQl1ckh00xSLx4OSmqwI1feJhUg17vdr0SrT6uNc3JyOe0xl4ZGjXh vpIQIPR6PX46bXUYf5bmfdErBTG4+mnATBhB1xLi1VjTISWhVrdJgu05YZqq9IvJ A5+SgNZBfKsNObwNjKk9MD0CpKc6gTjTXt7j0JmUX6ucVuA+CUnoW19VKYZ9O3hE ygCuJqr3f/YVptcEBWCixb+OQQ+bCTqmLc9g2POBb8F68T4KHb3zo81hpyW6T/Z0 LbunnBZ2R+rEqg== =ImGS -----END PGP SIGNATURE----- Merge tag 'for-5.14-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-nvidia Pull Tegra clk driver updates from Thierry Reding: This contains a few fixes across the board and adds stubs to allow certain drivers to be compile-tested. One other notable change added here is that clock enabling no longer deasserts the reset. Drivers are now supposed to do that explicitly because doing it implicitly can get in the way of certain power-up sequences. * tag 'for-5.14-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing() clk: tegra: Add stubs needed for compile-testing clk: tegra: Don't deassert reset on enabling clocks clk: tegra: Mark external clocks as not having reset control clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling clk: tegra: Don't allow zero clock rate for PLLs clk: tegra: Halve SCLK rate on Tegra20 clk: tegra: Ensure that PLLU configuration is applied properly clk: tegra: Fix refcounting of gate clocks clk: tegra30: Use 300MHz for video decoder by default
2026-10-14 05:55:17 +00:00 · 2021-06-21 16:36:46 -07:00 · 2021-06-21 16:36:46 -07:00 · 3f4e557db5
commit 3f4e557db5
parent 6efb943b86 f13570e7e8
11 changed files with 170 additions and 80 deletions
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
--- a/drivers/clk/tegra/clk-tegra-super-cclk.c
+++ b/drivers/clk/tegra/clk-tegra-super-cclk.c
--- a/drivers/clk/tegra/clk-tegra124-emc.c
+++ b/drivers/clk/tegra/clk-tegra124-emc.c
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h