clk: sunxi-ng: Adjust MP clock parent rate when allowed

Browse source

Currently MP clocks don't consider adjusting parent rate even if they
are allowed to do so. Such behaviour considerably lowers amount of
possible rates, which is very inconvenient when such clock is used for
pixel clock, for example.

In order to improve the situation, adjusting parent rate is considered
when allowed.

This code is inspired by clk_divider_bestdiv() function, which does
basically the same thing for different clock type.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

...

This commit is contained in:

Jernej Skrabec 2018-11-04 19:26:39 +01:00 • committed by Maxime Ripard

parent db75489346

commit 3f790433c3

No known key found for this signature in database

GPG key ID: E3EF0D6F671851C5

1 changed files with 62 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

64

drivers/clk/sunxi-ng/ccu_mp.c

View file