drm/bridge: ti-sn65dsi86: Reject modes with too large blanking

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The front and back porch registers are 8 bits, and pulse width registers
are 15 bits, so reject any modes with larger periods.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220831082653.20449-2-tomi.valkeinen@ideasonboard.com

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Tomi Valkeinen 2022-08-31 11:26:51 +03:00 • committed by Robert Foss

parent e06a46087d

commit 3fc307dcec

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drivers/gpu/drm/bridge/ti-sn65dsi86.c

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