drm/amd/display: Exit idle optimizations before attempt to access PHY

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[Why & How]
DMUB may hang when powering down pixel clocks due to no dprefclk.

It is fixed by exiting idle optimization before the attempt to access PHY.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Leo Chen 2023-07-12 16:50:15 -04:00 • committed by Alex Deucher

parent 0f3b9542c9

commit 4012e0917b

1 changed files with 3 additions and 0 deletions

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drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

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