clk: qcom: Support bypass RCG configuration

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In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.

Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

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This commit is contained in:

Stephen Boyd 2014-07-11 12:55:27 -07:00

parent 24d8fba44a

commit 404c1ff67d

3 changed files with 47 additions and 14 deletions

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51

drivers/clk/qcom/clk-rcg.c

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1

drivers/clk/qcom/clk-rcg.h

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9

drivers/clk/qcom/mmcc-msm8960.c

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