drm/amdgpu: Write masked value to control register

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On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
should be written into the control register instead of 0.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Maíra Canal 2022-07-14 13:44:56 -03:00 • committed by Alex Deucher

parent dc2b9c70eb

commit 40835624ef

2 changed files with 2 additions and 2 deletions

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2

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

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2

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

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