drm/i915/skl: Don't warn if reading back DPLL0 is disabled

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We can operate with DPLL0 off with CDCLK backed by the 24Mhz reference
clock, and that's a supported configuration. Don't warn when notice
DPLL0 is off then.

We still have a separate warn at boot if cdclk is disabled (because we
don't currently try to handle the case (that shouldn't happen on SKL as
far as I know) where we boot with display not initialized.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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Damien Lespiau 2015-06-04 18:21:31 +01:00 • committed by Jani Nikula

parent a9419e846b

commit 414355a7c3

1 changed files with 1 additions and 3 deletions

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drivers/gpu/drm/i915/intel_display.c

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