drm/i915: Include TLB miss latency in g4x watermark computations

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Reports of FIFO underruns are still persisting on gm45.

References: https://bugs.freedesktop.org/show_bug.cgi?id=27589
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

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Chris Wilson 2011-01-19 15:04:42 +00:00

parent 633f2ea266

commit 417ae1476d

2 changed files with 160 additions and 65 deletions

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228

drivers/gpu/drm/i915/intel_display.c

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7

drivers/gpu/drm/i915/intel_drv.h

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