crypto: nx-842 - Mask XERS0 bit in return value

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[ Upstream commit 6333ed8f26 ]

NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is
nothing to do with NX request. Since this bit can be set with other
valuable return status, mast this bit.

One of other bits (INITIATED, BUSY or REJECTED) will be returned for
any given NX request.

Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Haren Myneni 2016-08-30 00:34:57 -04:00 • committed by Greg Kroah-Hartman

parent f88503578d

commit 4259821921

2 changed files with 9 additions and 4 deletions

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1

arch/powerpc/include/asm/icswx.h

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12

drivers/crypto/nx/nx-842-powernv.c

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