drm: bridge/dw_hdmi: adjust pixel clock values in N calculation

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Adjust the pixel clock values in the N calculation to match the more
accurate clock values we're given by the DRM subsystem, which are the
kHz pixel rate, with any fractional kHz rounded down in the case of
the non-240, non-480 line modes, or rounded up for the others.  So,

	 25.20 / 1.001 =>  25175
	 27.00 * 1.001 =>  27027
	 74.25 / 1.001 =>  74176
	148.50 / 1.001 => 148352

DRM derives these rates from the EDID CEA mode identifiers, which are
looked up in the tables in drivers/gpu/drm/drm_edid.c.  The values on
the right are the clock values found in these tables, and are
currently expected to be passed to the HDMI driver unchanged.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

...

This commit is contained in:

Russell King 2015-07-22 10:39:27 +01:00

parent d0c96d1680

commit 426701d0cc

1 changed files with 10 additions and 10 deletions

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drivers/gpu/drm/bridge/dw_hdmi.c

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