MIPS: Loongson64: Set IPI_Enable register per core by itself

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In the current code, for example, core 1 sets Core[0, 1, 2, 3]_IPI_Enalbe
register and core 2, 3 do the same thing on the 1-way Loongson64 platform,
this is not necessary. Set IPI_Enable register per core by itself to avoid
duplicate operations and make the logic more clear.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

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Tiezhu Yang 2020-11-03 15:12:02 +08:00 • committed by Thomas Bogendoerfer

parent fe9863a19a

commit 42831cd708

1 changed files with 2 additions and 2 deletions

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arch/mips/loongson64/smp.c

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