crypto: octeontx2 - load microcode and create engine groups

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CPT includes microcoded GigaCypher symmetric engines(SEs), IPsec
symmetric engines(IEs), and asymmetric engines (AEs).
Each engine receives CPT instructions from the engine groups it has
subscribed to. This patch loads microcode, configures three engine
groups(one for SEs, one for IEs and one for AEs), and configures
all engines.

Signed-off-by: Suheil Chandran <schandran@marvell.com>
Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com>
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

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This commit is contained in:

Srujana Challa 2021-01-15 19:22:22 +05:30 • committed by Herbert Xu

parent fe16eceab0

commit 43ac0b824f

8 changed files with 1655 additions and 2 deletions

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2

drivers/crypto/marvell/octeontx2/Makefile

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42

drivers/crypto/marvell/octeontx2/otx2_cpt_common.h

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77

drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c

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3

drivers/crypto/marvell/octeontx2/otx2_cptpf.h

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72

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

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46

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

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1254

drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c

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161

drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h

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