perf/x86/intel/uncore: Add Rocket Lake support

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For Rocket Lake, the MSR uncore, e.g., CBOX, ARB and CLOCKBOX, are the
same as Tiger Lake. Share the perf code with it.

For Rocket Lake and Tiger Lake, the 8th CBOX is not mapped into a
different MSR space anymore. Add rkl_uncore_msr_init_box() to replace
skl_uncore_msr_init_box().

The IMC uncore is the similar to Ice Lake. Add new PCIIDs of IMC for
Rocket Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-4-kan.liang@linux.intel.com

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Kan Liang 2020-10-19 08:35:28 -07:00 • committed by Peter Zijlstra

parent 907a196fbc

commit 43bc103a80

2 changed files with 25 additions and 1 deletions

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6

arch/x86/events/intel/uncore.c

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20

arch/x86/events/intel/uncore_snb.c

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