iio: adc: ti-adc161s626: Fix alignment for DMA safety

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[ Upstream commit 3a828f204a ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 4d671b71be ("iio: adc: ti-adc161s626: add support for TI 1-channel differential ADCs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-34-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Jonathan Cameron 2022-05-08 18:56:13 +01:00 • committed by Greg Kroah-Hartman

parent 117923572e

commit 43e9bfc827

1 changed files with 1 additions and 1 deletions

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drivers/iio/adc/ti-adc161s626.c

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