clk: renesas: r9a07g043: Add clock and reset entry for PLIC

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Add the missing clock and reset entry for PLIC. Also add
R9A07G043_NCEPLIC_ACLK to the critical clocks list.

Fixes: 95d48d2703 ("clk: renesas: r9a07g043: Add support for RZ/Five SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240403200952.633084-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Lad Prabhakar 2024-04-03 21:09:52 +01:00 • committed by Geert Uytterhoeven

parent ef9916d0e2

commit 44019387fc

1 changed files with 9 additions and 0 deletions

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drivers/clk/renesas/r9a07g043-cpg.c

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