drm/i915: Enable eDP DRRS for CHV

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This patch enables eDP DRRS for CHV by adding the
required IS_CHERRYVIEW() checks.
CHV uses the same register bit as VLV.

[Vandana]: Since CHV has 2 sets of M_N registers, it will follow the same code
path as gen < 8. Added CHV check in dp_set_m_n()

[Ram]: Rebased on top of previous patch modifications

Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Durgadoss R 2015-02-13 15:33:02 +05:30 • committed by Daniel Vetter

parent 6fa7aec1db

commit 44395bfe2f

2 changed files with 2 additions and 2 deletions

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2

drivers/gpu/drm/i915/intel_display.c

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2

drivers/gpu/drm/i915/intel_dp.c

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