drm/i915/icl: MBUS B credit change

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No functional change. But just a minor change to keep
up with Spec, since it has changed since commit c3cc39c539
("drm/i915/icl: program mbus during pipe enable")

The instructions previously said to program pipe's
B credit = 24 / number of pipes, which is 8 for ICL.
Now the spec gives us direct values independent of number
of pipes. Let's keep in sync.

Also just a reorder on fields to make easier to compare
against spec's sequence: A -> BW -> B.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004151814.6054-1-rodrigo.vivi@intel.com

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This commit is contained in:

Rodrigo Vivi 2018-10-04 08:18:14 -07:00

parent dfdaa566b7

commit 443d5e3973

1 changed files with 3 additions and 4 deletions

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drivers/gpu/drm/i915/intel_display.c

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