drm/amd/display: fix dcn3+ bw validation soc param update sequence

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SOC needs to be updated to the WM set A values before validation
happens.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Dmytro Laktyushkin 2021-02-17 11:32:10 -05:00 • committed by Alex Deucher

parent 8ee0fea4ba

commit 443dfba024

5 changed files with 17 additions and 5 deletions

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17

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c

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1

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.h

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1

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c

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1

drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c

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2

drivers/gpu/drm/amd/display/dc/inc/core_types.h

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