spi: a3700: Clear DATA_OUT when performing a read

When performing a read using FIFO mode, the spi controller shifts out
the last 2 bytes that were written in a previous transfer on MOSI.

This undocumented behaviour can cause devices to misinterpret the
transfer, so we explicitly clear the WFIFO before each read.

This behaviour was noticed on EspressoBin.

Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Maxime Chevallier 2018-01-17 17:15:25 +01:00 • committed by Mark Brown
commit 44a5f423e7
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