diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 85deda6d4292..2a6a9441c23d 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -79,6 +79,7 @@ properties: - toradex,verdin-am62-nonwifi-ivy # Verdin AM62 Module on Ivy - toradex,verdin-am62-nonwifi-mallow # Verdin AM62 Module on Mallow - toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia + - toradex,verdin-am62-nonwifi-zinnia # Verdin AM62 Module on Zinnia - const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT - const: toradex,verdin-am62 # Verdin AM62 Module - const: ti,am625 @@ -91,6 +92,7 @@ properties: - toradex,verdin-am62-wifi-ivy # Verdin AM62 Wi-Fi / BT Module on Ivy - toradex,verdin-am62-wifi-mallow # Verdin AM62 Wi-Fi / BT Module on Mallow - toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia + - toradex,verdin-am62-wifi-zinnia # Verdin AM62 Wi-Fi / BT Module on Zinnia - const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module - const: toradex,verdin-am62 # Verdin AM62 Module - const: ti,am625 @@ -103,6 +105,7 @@ properties: - toradex,verdin-am62p-nonwifi-ivy # Verdin AM62P Module on Ivy - toradex,verdin-am62p-nonwifi-mallow # Verdin AM62P Module on Mallow - toradex,verdin-am62p-nonwifi-yavia # Verdin AM62P Module on Yavia + - toradex,verdin-am62p-nonwifi-zinnia # Verdin AM62P Module on Zinnia - const: toradex,verdin-am62p-nonwifi # Verdin AM62P Module without Wi-Fi / BT - const: toradex,verdin-am62p # Verdin AM62P Module - const: ti,am62p5 @@ -115,6 +118,7 @@ properties: - toradex,verdin-am62p-wifi-ivy # Verdin AM62P Wi-Fi / BT Module on Ivy - toradex,verdin-am62p-wifi-mallow # Verdin AM62P Wi-Fi / BT Module on Mallow - toradex,verdin-am62p-wifi-yavia # Verdin AM62P Wi-Fi / BT Module on Yavia + - toradex,verdin-am62p-wifi-zinnia # Verdin AM62P Wi-Fi / BT Module on Zinnia - const: toradex,verdin-am62p-wifi # Verdin AM62P Wi-Fi / BT Module - const: toradex,verdin-am62p # Verdin AM62P Module - const: ti,am62p5 @@ -208,7 +212,6 @@ properties: items: - enum: - beagle,am67a-beagley-ai - - kontron,sa67 # Kontron SMARC-sAM67 board - ti,j722s-evm - const: ti,j722s diff --git a/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml index a77e67f6cb82..0b752f3baaa9 100644 --- a/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml +++ b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml @@ -16,12 +16,7 @@ description: | properties: compatible: - oneOf: - - items: - - enum: - - kontron,sa67mcu - - const: kontron,sl28cpld - - const: kontron,sl28cpld + const: kontron,sl28cpld reg: description: diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index ba01a929e06f..5269c9619b65 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -19,11 +19,13 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-yavia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-zinnia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo @@ -62,6 +64,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo # Boards with AM64x SoC dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg0.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo @@ -132,6 +135,12 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo # Boards with J721s2 SoC dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar-lvds-ph128800t006.dtb +k3-am68-phyboard-izar-lvds-ph128800t006-dtbs := k3-am68-phyboard-izar.dtb \ + k3-am68-phyboard-izar-lvds-ph128800t006.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar-peb-av-15.dtb +k3-am68-phyboard-izar-peb-av-15-dtbs := k3-am68-phyboard-izar.dtb \ + k3-am68-phyboard-izar-peb-av-15.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb @@ -142,17 +151,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo # Boards with J722s SoC -k3-am67a-kontron-sa67-dtbs := k3-am67a-kontron-sa67-base.dtb \ - k3-am67a-kontron-sa67-rtc-rv8263.dtbo k3-am67a-kontron-sa67-gbe1.dtbo -k3-am67a-kontron-sa67-ads2-dtbs := k3-am67a-kontron-sa67.dtb k3-am67a-kontron-sa67-ads2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67.dtb -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-base.dtb -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gbe1.dtbo -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gpios.dtbo -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-rtc-rv8263.dtbo -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtb -dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo @@ -218,6 +217,8 @@ k3-am62p5-sk-csi2-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-ov5640.dtbo k3-am62p5-sk-csi2-tevi-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo +k3-am642-evm-icssg0-dtbs := \ + k3-am642-evm.dtb k3-am642-evm-icssg0.dtbo k3-am642-evm-icssg1-dualemac-dtbs := \ k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo k3-am642-evm-icssg1-dualemac-mii-dtbs := \ @@ -244,8 +245,6 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo -k3-am67a-kontron-sa67-base-gpios-dtbs := \ - k3-am67a-kontron-sa67-base.dtb k3-am67a-kontron-sa67-gpios.dtbo k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ @@ -306,6 +305,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-imx219.dtb \ k3-am62p5-sk-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-tevi-ov5640.dtb \ + k3-am642-evm-icssg0.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-evm-icssg1-dualemac-mii.dtb \ k3-am642-evm-pcie0-ep.dtb \ @@ -318,7 +318,8 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ - k3-am67a-kontron-sa67-base-gpios.dtb \ + k3-am68-phyboard-izar-lvds-ph128800t006.dtb \ + k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts index 3e2d8f669535..8a556fbbe08b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -88,13 +88,13 @@ AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */ AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */ AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (V2) MMC0_DAT0 */ - AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (V1) MMC0_DAT1 */ - AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (W2) MMC0_DAT2 */ - AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (W1) MMC0_DAT3 */ - AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (Y2) MMC0_DAT4 */ - AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (W3) MMC0_DAT5 */ - AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (W4) MMC0_DAT6 */ - AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (V4) MMC0_DAT7 */ + AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (V1) MMC0_DAT1 */ + AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (W2) MMC0_DAT2 */ + AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (W1) MMC0_DAT3 */ + AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (Y2) MMC0_DAT4 */ + AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (W3) MMC0_DAT5 */ + AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W4) MMC0_DAT6 */ + AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (V4) MMC0_DAT7 */ >; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi index e15da771bc07..3baa653257bb 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi @@ -37,6 +37,13 @@ #size-cells = <2>; ranges; + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x8000000>; + linux,cma-default; + }; + ramoops@9c700000 { compatible = "ramoops"; reg = <0x00 0x9c700000 0x00 0x00100000>; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-zinnia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-zinnia.dtsi new file mode 100644 index 000000000000..0ce8357797ed --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-zinnia.dtsi @@ -0,0 +1,493 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common dtsi for Verdin AM62 SoM on Zinnia carrier board + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +#include +#include + +/ { + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_zinnia_leds>; + + /* LED1 Red - SODIMM 48 - LED1_R */ + led-0 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>; + }; + + /* LED1 Blue - SODIMM 46 - LED1_B */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Red - SODIMM 44 - LED3_R */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Green - SODIMM 54 - LED3_G */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Blue - SODIMM 36 - LED3_B */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio1 9 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Red - SODIMM 34 - LED4_R */ + led-5 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 10 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Green - SODIMM 32 - LED4_G */ + led-6 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Blue - SODIMM 30 - LED4_B */ + led-7 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 11 GPIO_ACTIVE_HIGH>; + }; + }; + + zinnia-1v8-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_4 */ + io-channels = <&verdin_som_adc 4>; + full-ohms = <39000>; /* 12K + 27K */ + output-ohms = <27000>; + }; + + zinnia-3v3-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_3 */ + io-channels = <&verdin_som_adc 5>; + full-ohms = <54000>; /* 27K + 27K */ + output-ohms = <27000>; + }; + + zinnia-5v-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_2 */ + io-channels = <&verdin_som_adc 6>; + full-ohms = <39000>; /* 27K + 12K */ + output-ohms = <12000>; + }; + + /* Zinnia Power Supply Input Voltage */ + zinnia-input-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_1 */ + io-channels = <&verdin_som_adc 7>; + full-ohms = <204700>; /* 200K + 4.7K */ + output-ohms = <4700>; + }; +}; + +&main_pmx0 { + pinctrl_zinnia_leds: zinnia-leds-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */ /* SODIMM 36 */ + AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (B20) MCASP0_AXR0.GPIO1_10 */ /* SODIMM 34 */ + AM62X_IOPAD(0x01a4, PIN_INPUT, 7) /* (A19) MCASP0_ACLKX.GPIO1_11 */ /* SODIMM 30 */ + AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (A20) MCASP0_AFSX.GPIO1_12 */ /* SODIMM 32 */ + AM62X_IOPAD(0x0088, PIN_INPUT, 7) /* (L17) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */ + AM62X_IOPAD(0x0098, PIN_INPUT, 7) /* (R18) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */ + AM62X_IOPAD(0x008c, PIN_INPUT, 7) /* (L25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */ + AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */ + >; + }; +}; + +&mcu_pmx0 { + pinctrl_zinnia_spi1_cs0_gpio: mcu-gpio0-11-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x002c, PIN_INPUT, 7) /* (C6) WKUP_UART0_CTSn.GPIO0_11 */ /* SODIMM 143 */ + >; + }; +}; + +/* Verdin ETH */ +&cpsw3g { + status = "okay"; +}; + +/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ +&cpsw3g_mdio { + status = "okay"; + + cpsw3g_phy1: ethernet-phy@2 { + reg = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_rgmii_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <38 IRQ_TYPE_EDGE_FALLING>; + ti,rx-internal-delay = ; + }; +}; + +/* Verdin ETH_1 */ +&cpsw_port1 { + status = "okay"; +}; + +/* Verdin ETH_2_RGMII */ +&cpsw_port2 { + phy-handle = <&cpsw3g_phy1>; + phy-mode = "rgmii-id"; + + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ctrl_sleep_moci>, + <&pinctrl_gpio_5>, + <&pinctrl_gpio_6>, + <&pinctrl_gpio_7>, + <&pinctrl_gpio_8>, + <&pinctrl_qspi1_io0_gpio>; + gpio-line-names = + "", /* 0 */ + "", + "", + "DI3_RB", /* SODIMM 56 */ + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 30 */ + "", + "", + "", + "", + "", + "DI2_EN", /* SODIMM 218 */ + "", + "", + "", + "DI2_RB", /* SODIMM 216 */ /* 40 */ + "DO3_EN", /* SODIMM 220 */ + "DI3_EN", /* SODIMM 222 */ + "", + "", + "", + "", + "", + "", + "", + "", /* 50 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 60 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 70 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 80 */ + "", + "", + "", + "", + "", + ""; +}; + +&main_gpio1 { + gpio-line-names = + "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 30 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 40 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 50 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 60 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 70 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 80 */ + "", + "", + "", + "", + "", + "", + ""; +}; + +/* Verdin I2C_1 */ +&main_i2c1 { + status = "okay"; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Verdin CAN_1 */ +&main_mcan0 { + status = "okay"; +}; + +/* Verdin SPI_1 */ +&main_spi1 { + pinctrl-0 = <&pinctrl_spi1>, + <&pinctrl_zinnia_spi1_cs0_gpio>, + <&pinctrl_spi1_cs_gpio>; + cs-gpios = <&mcu_gpio0 11 GPIO_ACTIVE_LOW>, + <&main_gpio0 7 GPIO_ACTIVE_LOW>; + + status = "okay"; + + tpm@1 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <1>; + spi-max-frequency = <18500000>; + }; +}; + +/* Verdin UART_3 */ +&main_uart0 { + status = "okay"; +}; + +/* Verdin UART_1 */ +&main_uart1 { + status = "okay"; +}; + +&mcu_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_1>, + <&pinctrl_gpio_2>, + <&pinctrl_gpio_3>, + <&pinctrl_gpio_4>, + <&pinctrl_pcie_1_reset>; + gpio-line-names = + "", + "DO1_EN", /* SODIMM 206 */ + "DI1_EN", /* SODIMM 208 */ + "DI1_RB", /* SODIMM 210 */ + "DO2_EN", /* SODIMM 212 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + ""; +}; + +/* Verdin SD_1 */ +&sdhci1 { + status = "okay"; +}; + +/* Verdin USB_1 */ +&usb0 { + status = "okay"; +}; + +/* Verdin USB_2 */ +&usb1 { + status = "okay"; +}; + +/* Verdin USB_1 */ +&usbss0 { + status = "okay"; +}; + +/* Verdin USB_2 */ +&usbss1 { + status = "okay"; +}; + +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + +/* Verdin UART_2 */ +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_uart0>, <&pinctrl_wkup_uart0_rts>; + rs485-rts-active-low; + rs485-rx-during-tx; + linux,rs485-enabled-at-boot-time; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index 2a7242a2fef8..e97b2b047d10 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -278,7 +278,7 @@ }; /* Verdin SPI_1 CS as GPIO */ - pinctrl_qspi1_io4_gpio: main-gpio0-7-default-pins { + pinctrl_spi1_cs_gpio: main-gpio0-7-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x001c, PIN_INPUT, 7) /* (J23) OSPI0_D4.GPIO0_7 */ /* SODIMM 202 */ >; @@ -572,16 +572,16 @@ /* On-module eMMC */ pinctrl_sdhci0: main-mmc0-default-pins { pinctrl-single,pins = < - AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ - AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ - AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */ - AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */ - AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */ - AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */ - AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */ - AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */ - AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */ + AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ + AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ + AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ + AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ + AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ + AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ + AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ + AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ + AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ >; }; @@ -820,15 +820,27 @@ >; }; - /* Verdin UART_2 */ + /* Verdin UART_2 RX/TX */ pinctrl_wkup_uart0: wkup-uart0-default-pins { pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x002c, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */ - AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */ AM62X_MCU_IOPAD(0x0024, PIN_INPUT_PULLUP, 0) /* (B4) WKUP_UART0_RXD */ /* SODIMM 137 */ AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ /* SODIMM 139 */ >; }; + + /* Verdin UART_2 CTS */ + pinctrl_wkup_uart0_cts: wkup-uart0-cts-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x002c, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */ + >; + }; + + /* Verdin UART_2 RTS */ + pinctrl_wkup_uart0_rts: wkup-uart0-rts-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */ + >; + }; }; /* VERDIN I2S_1_MCLK */ @@ -1502,7 +1514,7 @@ /* Verdin UART_2 */ &wkup_uart0 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wkup_uart0>; + pinctrl-0 = <&pinctrl_wkup_uart0>, <&pinctrl_wkup_uart0_cts>, <&pinctrl_wkup_uart0_rts>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-zinnia.dts b/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-zinnia.dts new file mode 100644 index 000000000000..eba8d7a5b1bf --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-zinnia.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +/dts-v1/; + +#include "k3-am625.dtsi" +#include "k3-am62-verdin.dtsi" +#include "k3-am62-verdin-nonwifi.dtsi" +#include "k3-am62-verdin-zinnia.dtsi" + +/ { + model = "Toradex Verdin AM62 on Zinnia Board"; + compatible = "toradex,verdin-am62-nonwifi-zinnia", + "toradex,verdin-am62-nonwifi", + "toradex,verdin-am62", + "ti,am625"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-zinnia.dts b/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-zinnia.dts new file mode 100644 index 000000000000..6f3f8eb42ed6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-zinnia.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +/dts-v1/; + +#include "k3-am625.dtsi" +#include "k3-am62-verdin.dtsi" +#include "k3-am62-verdin-wifi.dtsi" +#include "k3-am62-verdin-zinnia.dtsi" + +/ { + model = "Toradex Verdin AM62 WB on Zinnia Board"; + compatible = "toradex,verdin-am62-wifi-zinnia", + "toradex,verdin-am62-wifi", + "toradex,verdin-am62", + "ti,am625"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index e99bdbc2e0cb..c1e9067b3bdd 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -282,6 +282,13 @@ bootph-all; }; + main_uart0_pins_wakeup: main-uart0-wakeup-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1c8, PIN_INPUT | PIN_WKUP_EN, 0) /* (E14) UART0_RXD */ + AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ + >; + }; + main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x01ac, PIN_INPUT, 2) /* (B21) MCASP0_AFSR.UART1_RXD */ @@ -398,7 +405,7 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins { pinctrl-single,pins = < - AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ + AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (N22) GPMC0_CLK.GPIO0_31 */ >; }; @@ -717,8 +724,12 @@ &main_uart0 { status = "okay"; - pinctrl-names = "default"; + pinctrl-names = "default", "wakeup"; pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-1 = <&main_uart0_pins_wakeup>; + wakeup-source = <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts index a5d5dc0a7bec..f5ceb6a1b5de 100644 --- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts @@ -199,6 +199,42 @@ &mcu_pmx0 { status = "okay"; + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (C7) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (E8) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x0038, PIN_INPUT | PIN_WKUP_EN, 0) /* (E8) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x003c, PIN_OUTPUT, 0) /* (D7) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x0040, PIN_INPUT, 0) /* (B9) MCU_MCAN1_RX */ + >; + }; + + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (B9) MCU_MCAN1_RX */ + >; + }; + pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins = < AM62DX_IOPAD(0x01f4, PIN_INPUT, 7) /* (F17) EXTINTn.GPIO1_31 */ @@ -228,6 +264,10 @@ &wkup_uart0 { pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; bootph-all; status = "reserved"; }; @@ -241,6 +281,13 @@ bootph-all; }; + main_uart0_pins_wakeup: main-uart0-wakeup-pins { + pinctrl-single,pins = < + AM62DX_IOPAD(0x01c8, PIN_INPUT | PIN_WKUP_EN, 0) /* (E14) UART0_RXD */ + AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ + >; + }; + main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ @@ -587,8 +634,12 @@ }; &main_uart0 { - pinctrl-names = "default"; + pinctrl-names = "default", "wakeup"; pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-1 = <&main_uart0_pins_wakeup>; + wakeup-source = <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; bootph-all; status = "okay"; }; @@ -737,4 +788,33 @@ firmware-name = "am62d-c71_0-fw"; }; +&mcu_mcan0 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; + pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_mcan1 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; + pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_uart0 { + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + #include "k3-am62a-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi index 883beb76ba9c..80615ca1e01a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi @@ -564,6 +564,13 @@ status = "disabled"; }; + rng: rng@3b100000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0x00 0x3b100000 0x00 0x7d>; + interrupts = ; + status = "reserved"; /* Reserved for OP-TEE */ + }; + oc_sram: sram@70800000 { compatible = "mmio-sram"; reg = <0x00 0x70800000 0x00 0x10000>; diff --git a/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi index 61bfcdcfc66e..b5b70e71a0b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi @@ -81,7 +81,7 @@ status = "disabled"; }; - target-module@2b300050 { + wkup_uart0_target: target-module@2b300050 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00 0x2b300050 0x00 0x4>, <0x00 0x2b300054 0x00 0x4>, @@ -127,6 +127,11 @@ bootph-all; }; + opp_efuse_table: syscon@18 { + compatible = "ti,am62-opp-efuse-table", "syscon"; + reg = <0x18 0x4>; + }; + cpsw_mac_syscon: ethernet-mac-syscon@2000 { compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; reg = <0x2000 0x8>; diff --git a/arch/arm64/boot/dts/ti/k3-am62l.dtsi b/arch/arm64/boot/dts/ti/k3-am62l.dtsi index 23acdbb301fe..28bb6ef2194f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62l.dtsi @@ -79,6 +79,7 @@ <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core Window */ <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core Window */ <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0 */ + <0x00 0x3b100000 0x00 0x3b100000 0x00 0x0000007d>, /* RNG */ <0x00 0x45810000 0x00 0x45810000 0x00 0x03170000>, /* DMSS */ <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC DATA */ <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS DAT1 */ @@ -92,7 +93,7 @@ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */ <0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */ <0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */ - <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */ + <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00200200>, /* Wakeup Peripheral Window */ <0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */ #address-cells = <2>; @@ -104,7 +105,7 @@ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */ <0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */ <0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */ - <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */ + <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00200200>, /* Wakeup Peripheral Window */ <0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */ #address-cells = <2>; diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts index cae04cce3373..a1af4571a815 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts @@ -272,9 +272,9 @@ AM62LX_IOPAD(0x0230, PIN_INPUT, 0) /* (Y3) MMC1_CMD */ AM62LX_IOPAD(0x0228, PIN_OUTPUT, 0) /* (Y2) MMC1_CLK */ AM62LX_IOPAD(0x0224, PIN_INPUT, 0) /* (AA1) MMC1_DAT0 */ - AM62LX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y4) MMC1_DAT1 */ - AM62LX_IOPAD(0x021c, PIN_INPUT_PULLUP, 0) /* (AA2) MMC1_DAT2 */ - AM62LX_IOPAD(0x0218, PIN_INPUT_PULLUP, 0) /* (AB2) MMC1_DAT3 */ + AM62LX_IOPAD(0x0220, PIN_INPUT, 0) /* (Y4) MMC1_DAT1 */ + AM62LX_IOPAD(0x021c, PIN_INPUT, 0) /* (AA2) MMC1_DAT2 */ + AM62LX_IOPAD(0x0218, PIN_INPUT, 0) /* (AB2) MMC1_DAT3 */ AM62LX_IOPAD(0x0234, PIN_INPUT, 0) /* (B6) MMC1_SDCD */ >; bootph-all; @@ -288,6 +288,13 @@ bootph-all; }; + uart0_pins_wakeup: uart0-wakeup-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01b4, PIN_INPUT | PIN_WKUP_EN, 0) /* (D13) UART0_RXD */ + AM62LX_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C13) UART0_TXD */ + >; + }; + usb1_default_pins: usb1-default-pins { pinctrl-single,pins = < AM62LX_IOPAD(0x0248, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (A5) USB1_DRVVBUS */ @@ -306,6 +313,12 @@ >; }; + wkup_uart0_pins_default: wkup-uart0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0000, PIN_INPUT, 0) /* (Y22) WKUP_UART0_RXD */ + AM62LX_IOPAD(0x0004, PIN_OUTPUT, 0) /* (AA23) WKUP_UART0_TXD */ + >; + }; }; &sdhci0 { @@ -329,7 +342,9 @@ &uart0 { pinctrl-0 = <&uart0_pins_default>; - pinctrl-names = "default"; + pinctrl-1 = <&uart0_pins_wakeup>; + pinctrl-names = "default", "wakeup"; + wakeup-source; status = "okay"; bootph-all; }; @@ -359,3 +374,12 @@ pinctrl-names = "default"; pinctrl-0 = <&usb1_default_pins>; }; + +&wkup_uart0 { + pinctrl-0 = <&wkup_uart0_pins_default>; + pinctrl-names = "default"; +}; + +&wkup_uart0_target { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62l3.dtsi b/arch/arm64/boot/dts/ti/k3-am62l3.dtsi index da220b851512..fc514e19f57d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l3.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62l3.dtsi @@ -39,6 +39,8 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&l2_0>; + operating-points-v2 = <&a53_opp_table>; + clocks = <&scmi_clk 356>; }; cpu1: cpu@1 { @@ -53,6 +55,8 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&l2_0>; + operating-points-v2 = <&a53_opp_table>; + clocks = <&scmi_clk 357>; }; }; @@ -64,4 +68,47 @@ cache-line-size = <64>; cache-sets = <256>; }; + + a53_opp_table: opp-table { + compatible = "operating-points-v2-ti-cpu"; + opp-shared; + syscon = <&opp_efuse_table>; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-supported-hw = <0x01 0x0003>; + clock-latency-ns = <6000000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-supported-hw = <0x01 0x0003>; + clock-latency-ns = <6000000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-supported-hw = <0x01 0x0003>; + clock-latency-ns = <6000000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-supported-hw = <0x01 0x0003>; + clock-latency-ns = <6000000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-supported-hw = <0x01 0x0002>; + clock-latency-ns = <6000000>; + }; + + opp-1250000000 { + opp-hz = /bits/ 64 <1250000000>; + opp-supported-hw = <0x01 0x0002>; + clock-latency-ns = <6000000>; + opp-suspend; + }; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 0e1af2a69ca2..f130c7cb998d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -543,10 +543,9 @@ main_gpio_intr: interrupt-controller@a00000 { compatible = "ti,sci-intr"; reg = <0x00 0x00a00000 0x00 0x800>; - ti,intr-trigger-type = <1>; interrupt-controller; interrupt-parent = <&gic500>; - #interrupt-cells = <1>; + #interrupt-cells = <2>; ti,sci = <&dmsc>; ti,sci-dev-id = <3>; ti,interrupt-ranges = <0 32 16>; @@ -558,8 +557,9 @@ gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; - interrupts = <190>, <191>, <192>, - <193>, <194>, <195>; + interrupts = <190 IRQ_TYPE_EDGE_RISING>, <191 IRQ_TYPE_EDGE_RISING>, + <192 IRQ_TYPE_EDGE_RISING>, <193 IRQ_TYPE_EDGE_RISING>, + <194 IRQ_TYPE_EDGE_RISING>, <195 IRQ_TYPE_EDGE_RISING>; interrupt-controller; #interrupt-cells = <2>; ti,davinci-gpio-unbanked = <0>; @@ -574,8 +574,9 @@ gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; - interrupts = <180>, <181>, <182>, - <183>, <184>, <185>; + interrupts = <180 IRQ_TYPE_EDGE_RISING>, <181 IRQ_TYPE_EDGE_RISING>, + <182 IRQ_TYPE_EDGE_RISING>, <183 IRQ_TYPE_EDGE_RISING>, + <184 IRQ_TYPE_EDGE_RISING>, <185 IRQ_TYPE_EDGE_RISING>; interrupt-controller; #interrupt-cells = <2>; ti,davinci-gpio-unbanked = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-zinnia.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-zinnia.dtsi new file mode 100644 index 000000000000..84ae99dcdda3 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin-zinnia.dtsi @@ -0,0 +1,469 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common dtsi for Verdin AM62P SoM on Zinnia carrier board + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +#include +#include + +/ { + aliases { + eeprom1 = &carrier_eeprom; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_zinnia_leds>; + + /* LED1 Red - SODIMM 48 - LED1_R */ + led-0 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>; + }; + + /* LED1 Blue - SODIMM 46 - LED1_B */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Red - SODIMM 44 - LED3_R */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Green - SODIMM 54 - LED3_G */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>; + }; + + /* LED3 Blue - SODIMM 36 - LED3_B */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <3>; + gpios = <&main_gpio1 9 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Red - SODIMM 34 - LED4_R */ + led-5 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 10 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Green - SODIMM 32 - LED4_G */ + led-6 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + /* LED4 Blue - SODIMM 30 - LED4_B */ + led-7 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + function-enumerator = <4>; + gpios = <&main_gpio1 11 GPIO_ACTIVE_HIGH>; + }; + }; + + zinnia-1v8-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_4 */ + io-channels = <&som_adc 4>; + full-ohms = <39000>; /* 12K + 27K */ + output-ohms = <27000>; + }; + + zinnia-3v3-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_3 */ + io-channels = <&som_adc 5>; + full-ohms = <54000>; /* 27K + 27K */ + output-ohms = <27000>; + }; + + zinnia-5v-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_2 */ + io-channels = <&som_adc 6>; + full-ohms = <39000>; /* 27K + 12K */ + output-ohms = <12000>; + }; + + /* Zinnia Power Supply Input Voltage */ + zinnia-input-voltage { + compatible = "voltage-divider"; + /* Verdin ADC_1 */ + io-channels = <&som_adc 7>; + full-ohms = <204700>; /* 200K + 4.7K */ + output-ohms = <4700>; + }; +}; + +&main_pmx0 { + pinctrl_zinnia_leds: zinnia-leds-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x019c, PIN_INPUT, 7) /* (E24) MCASP0_AXR1.GPIO1_9 */ /* SODIMM 36 */ + AM62PX_IOPAD(0x01a0, PIN_INPUT, 7) /* (F23) MCASP0_AXR0.GPIO1_10 */ /* SODIMM 34 */ + AM62PX_IOPAD(0x01a4, PIN_INPUT, 7) /* (F24) MCASP0_ACLKX.GPIO1_11 */ /* SODIMM 30 */ + AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */ /* SODIMM 32 */ + AM62PX_IOPAD(0x0088, PIN_INPUT, 7) /* (R24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */ + AM62PX_IOPAD(0x0098, PIN_INPUT, 7) /* (AA24) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */ + AM62PX_IOPAD(0x008c, PIN_INPUT, 7) /* (T25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */ + AM62PX_IOPAD(0x002c, PIN_INPUT, 7) /* (M25) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */ + >; + }; +}; + +&mcu_pmx0 { + pinctrl_zinnia_spi1_cs0_gpio: mcu-gpio0-11-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x002c, PIN_INPUT, 7) /* (C7) WKUP_UART0_CTSn.GPIO0_11 */ /* SODIMM 143 */ + >; + }; +}; + +/* Verdin ETHs */ +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1>, <&pinctrl_rgmii2>; + + status = "okay"; +}; + +/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ +&cpsw3g_mdio { + status = "okay"; + + carrier_eth_phy: ethernet-phy@2 { + reg = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_rgmii_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <42 IRQ_TYPE_EDGE_FALLING>; + ti,rx-internal-delay = ; + }; +}; + +/* Verdin ETH_1 (On-module PHY) */ +&cpsw_port1 { + status = "okay"; +}; + +/* Verdin ETH_2_RGMII */ +&cpsw_port2 { + phy-handle = <&carrier_eth_phy>; + phy-mode = "rgmii-id"; + + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_1_reset>, + <&pinctrl_gpio_5>, + <&pinctrl_gpio_6>, + <&pinctrl_gpio_7>, + <&pinctrl_gpio_8>, + <&pinctrl_qspi1_io0_gpio>; + gpio-line-names = + "", /* 0 */ + "", + "", + "DI3_RB", /* SODIMM 56 */ + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 30 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 40 */ + "", + "", + "", + "", + "", + "", + "", + "", + "DI2_RB", /* SODIMM 216 */ + "DI2_EN", /* SODIMM 218 */ /* 50 */ + "DO3_EN", /* SODIMM 220 */ + "DI3_EN", /* SODIMM 222 */ + "", + "", + "", + "", + "", + "", + "", + "", /* 60 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 70 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 80 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 90 */ + ""; +}; + +&main_gpio1 { + gpio-line-names = + "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 30 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 40 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 50 */ + ""; +}; + +/* Verdin I2C_1 */ +&main_i2c0 { + status = "okay"; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Verdin CAN_1 */ +&main_mcan0 { + status = "okay"; +}; + +/* Verdin SPI_1 */ +&main_spi1 { + pinctrl-0 = <&pinctrl_main_spi1>, + <&pinctrl_zinnia_spi1_cs0_gpio>, + <&pinctrl_spi1_cs_gpio>; + cs-gpios = <&mcu_gpio0 11 GPIO_ACTIVE_LOW>, + <&main_gpio0 7 GPIO_ACTIVE_LOW>; + + status = "okay"; + + tpm@1 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <1>; + spi-max-frequency = <18500000>; + }; +}; + +/* Verdin UART_3, used as the Linux console */ +&main_uart0 { + status = "okay"; +}; + +/* Verdin UART_1 */ +&main_uart1 { + status = "okay"; +}; + +&mcu_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_1>, + <&pinctrl_gpio_2>, + <&pinctrl_gpio_4>, + <&pinctrl_gpio_3>; + gpio-line-names = + "", + "DO1_EN", /* SODIMM 206 */ + "DI1_EN", /* SODIMM 208 */ + "DI1_RB", /* SODIMM 210 */ + "DO2_EN", /* SODIMM 212 */ + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + ""; +}; + +/* Verdin SD_1 */ +&sdhci1 { + status = "okay"; +}; + +/* Verdin USB_1 */ +&usb0 { + status = "okay"; +}; + +/* Verdin USB_2 */ +&usb1 { + status = "okay"; +}; + +/* Verdin USB_1 */ +&usbss0 { + status = "okay"; +}; + +/* Verdin USB_2 */ +&usbss1 { + status = "okay"; +}; + +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + +/* Verdin UART_2 */ +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_uart0>, + <&pinctrl_wkup_uart0_rts>; + rs485-rts-active-low; + rs485-rx-during-tx; + linux,rs485-enabled-at-boot-time; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi index 34954df692a3..7ee894d59113 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi @@ -247,6 +247,13 @@ >; }; + /* Verdin SPI_1_CS as GPIO */ + pinctrl_spi1_cs_gpio: main-gpio0-7-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x001c, PIN_OUTPUT, 7) /* (N21) OSPI0_D4.GPIO0_7 */ /* SODIMM 202 */ + >; + }; + /* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */ pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins { pinctrl-single,pins = < @@ -767,15 +774,27 @@ >; }; - /* Verdin UART_2 */ + /* Verdin UART_2 RX/TX */ pinctrl_wkup_uart0: wkup-uart0-default-pins { pinctrl-single,pins = < - AM62PX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ /* SODIMM 143 */ - AM62PX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ /* SODIMM 141 */ AM62PX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ /* SODIMM 137 */ AM62PX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ /* SODIMM 139 */ >; }; + + /* Verdin UART_2 CTS */ + pinctrl_wkup_uart0_cts: wkup-uart0-cts-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ /* SODIMM 143 */ + >; + }; + + /* Verdin UART_2 RTS */ + pinctrl_wkup_uart0_rts: wkup-uart0-rts-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ /* SODIMM 141 */ + >; + }; }; /* Verdin I2S_1_MCLK */ @@ -1410,7 +1429,9 @@ /* Verdin UART_2 */ &wkup_uart0 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wkup_uart0>; + pinctrl-0 = <&pinctrl_wkup_uart0>, + <&pinctrl_wkup_uart0_cts>, + <&pinctrl_wkup_uart0_rts>; uart-has-rtscts; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 4f7f6f95b02e..b770ed82be9d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -271,9 +271,9 @@ AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ - AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ - AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ - AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ + AM62PX_IOPAD(0x022c, PIN_INPUT, 0) /* (H23) MMC1_DAT1 */ + AM62PX_IOPAD(0x0228, PIN_INPUT, 0) /* (H22) MMC1_DAT2 */ + AM62PX_IOPAD(0x0224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */ AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ >; bootph-all; @@ -336,6 +336,13 @@ bootph-all; }; + main_uart0_pins_wakeup: main-uart0-wakeup-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x1c8, PIN_INPUT | PIN_WKUP_EN, 0) /* (A22) UART0_RXD */ + AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ + >; + }; + main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */ @@ -692,8 +699,12 @@ }; &main_uart0 { - pinctrl-names = "default"; + pinctrl-names = "default", "wakeup"; pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-1 = <&main_uart0_pins_wakeup>; + wakeup-source = <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; status = "okay"; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-zinnia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-zinnia.dts new file mode 100644 index 000000000000..8abf4fe60e99 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-zinnia.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +/dts-v1/; + +#include "k3-am62p5.dtsi" +#include "k3-am62p-verdin.dtsi" +#include "k3-am62p-verdin-nonwifi.dtsi" +#include "k3-am62p-verdin-zinnia.dtsi" + +/ { + model = "Toradex Verdin AM62P on Zinnia Board"; + compatible = "toradex,verdin-am62p-nonwifi-zinnia", + "toradex,verdin-am62p-nonwifi", + "toradex,verdin-am62p", + "ti,am62p5"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-zinnia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-zinnia.dts new file mode 100644 index 000000000000..e1df7cffdf63 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-zinnia.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p + * https://www.toradex.com/products/carrier-board/zinnia-carrier-board + */ + +/dts-v1/; + +#include "k3-am62p5.dtsi" +#include "k3-am62p-verdin.dtsi" +#include "k3-am62p-verdin-wifi.dtsi" +#include "k3-am62p-verdin-zinnia.dtsi" + +/ { + model = "Toradex Verdin AM62P WB on Zinnia Board"; + compatible = "toradex,verdin-am62p-wifi-zinnia", + "toradex,verdin-am62p-wifi", + "toradex,verdin-am62p", + "ti,am62p5"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi index 50ed859ae06c..ab9e58c2d225 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -151,6 +151,13 @@ >; }; + main_uart0_pins_wakeup: main-uart0-wakeup-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x1c8, PIN_INPUT | PIN_WKUP_EN, 0) /* (D14/A13) UART0_RXD */ + AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */ + >; + }; + main_uart1_pins_default: main-uart1-default-pins { bootph-pre-ram; pinctrl-single,pins = < @@ -322,8 +329,12 @@ &main_uart0 { bootph-all; status = "okay"; - pinctrl-names = "default"; + pinctrl-names = "default", "wakeup"; pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-1 = <&main_uart0_pins_wakeup>; + wakeup-source = <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; }; &main_uart1 { diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg0.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg0.dtso new file mode 100644 index 000000000000..0c8e245e526c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg0.dtso @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for enabling ICSSG0 dual EMAC on AM642 EVM + * + * AM642 EVM Product link: https://www.ti.com/tool/TMDS64EVM + * DP83TG720 daughter card link: https://www.ti.com/tool/DP83TG720-IND-SPE-EVM + * + * Copyright (C) 2020-2026 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&{/} { + icssg0_eth: icssg0-eth { + compatible = "ti,am642-icssg-prueth"; + pinctrl-names = "default"; + pinctrl-0 = <&pru_icssg0_rgmii1_pins_default>, <&pru_icssg0_rgmii2_pins_default>; + sram = <&oc_sram>; + + dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */ + <&main_pktdma 0xc101 15>, /* egress slice 0 */ + <&main_pktdma 0xc102 15>, /* egress slice 0 */ + <&main_pktdma 0xc103 15>, /* egress slice 0 */ + <&main_pktdma 0xc104 15>, /* egress slice 1 */ + <&main_pktdma 0xc105 15>, /* egress slice 1 */ + <&main_pktdma 0xc106 15>, /* egress slice 1 */ + <&main_pktdma 0xc107 15>, /* egress slice 1 */ + <&main_pktdma 0x4100 15>, /* ingress slice 0 */ + <&main_pktdma 0x4101 15>; /* ingress slice 1 */ + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1"; + + interrupt-parent = <&icssg0_intc>; + interrupts = <24 0 2>, <25 1 3>; + interrupt-names = "tx_ts0", "tx_ts1"; + + ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>; + firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf", + "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf", + "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf", + "ti-pruss/am64x-sr2-pru1-prueth-fw.elf", + "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf", + "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf"; + + ti,pruss-gp-mux-sel = <2>, /* MII mode */ + <2>, + <2>, + <2>, /* MII mode */ + <2>, + <2>; + + ti,mii-g-rt = <&icssg0_mii_g_rt>; + ti,mii-rt = <&icssg0_mii_rt>; + ti,iep = <&icssg0_iep0>, <&icssg0_iep1>; + ti,pa-stats = <&icssg0_pa_stats>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + icssg0_emac0: port@0 { + reg = <0>; + phy-handle = <&icssg0_phy00>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&main_conf 0x4100>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + + icssg0_emac1: port@1 { + reg = <1>; + phy-handle = <&icssg0_phy01>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&main_conf 0x4104>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; +}; + +&main_pmx0 { + pru_icssg0_mdio_pins_default: pru-icssg0-mdio-pins { + pinctrl-single,pins = < + /* (P3) PRG0_MDIO0_MDC */ + AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) + /* (P2) PRG0_MDIO0_MDIO */ + AM64X_IOPAD(0x0200, PIN_INPUT, 0) + /* (P16) GPIO0_32 - GPMC0_ADVn_ALE - GPIO_ETH0/1_RESETn# */ + AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) + >; + }; + + pru_icssg0_rgmii1_pins_default: pru-icssg0-rgmii1-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0160, PIN_INPUT, 2) /* (Y1) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */ + AM64X_IOPAD(0x0164, PIN_INPUT, 2) /* (R4) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */ + AM64X_IOPAD(0x0168, PIN_INPUT, 2) /* (U2) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */ + AM64X_IOPAD(0x016c, PIN_INPUT, 2) /* (V2) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */ + AM64X_IOPAD(0x0178, PIN_INPUT, 2) /* (T3) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */ + AM64X_IOPAD(0x0170, PIN_INPUT, 2) /* (AA2) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */ + AM64X_IOPAD(0x018c, PIN_OUTPUT, 2) /* (Y3) PRG0_PRU0_GPO11.PRG0_RGMII1_TD0 */ + AM64X_IOPAD(0x0190, PIN_OUTPUT, 2) /* (AA3) PRG0_PRU0_GPO12.PRG0_RGMII1_TD1 */ + AM64X_IOPAD(0x0194, PIN_OUTPUT, 2) /* (R6) PRG0_PRU0_GPO13.PRG0_RGMII1_TD2 */ + AM64X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (V4) PRG0_PRU0_GPO14.PRG0_RGMII1_TD3 */ + AM64X_IOPAD(0x01a0, PIN_OUTPUT, 2) /* (U4) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */ + AM64X_IOPAD(0x019c, PIN_OUTPUT, 2) /* (T5) PRG0_PRU0_GPO15.PRG0_RGMII1_TX_CTL */ + >; + }; + + pru_icssg0_rgmii2_pins_default: pru-icssg0-rgmii2-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01b0, PIN_INPUT, 2) /* (Y2) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */ + AM64X_IOPAD(0x01b4, PIN_INPUT, 2) /* (W2) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */ + AM64X_IOPAD(0x01b8, PIN_INPUT, 2) /* (V3) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */ + AM64X_IOPAD(0x01bc, PIN_INPUT, 2) /* (T4) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */ + AM64X_IOPAD(0x01c8, PIN_INPUT, 2) /* (R5) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */ + AM64X_IOPAD(0x01c0, PIN_INPUT, 2) /* (W3) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */ + AM64X_IOPAD(0x01dc, PIN_OUTPUT, 2) /* (W4) PRG0_PRU1_GPO11.PRG0_RGMII2_TD0 */ + AM64X_IOPAD(0x01e0, PIN_OUTPUT, 2) /* (Y4) PRG0_PRU1_GPO12.PRG0_RGMII2_TD1 */ + AM64X_IOPAD(0x01e4, PIN_OUTPUT, 2) /* (T6) PRG0_PRU1_GPO13.PRG0_RGMII2_TD2 */ + AM64X_IOPAD(0x01e8, PIN_OUTPUT, 2) /* (U6) PRG0_PRU1_GPO14.PRG0_RGMII2_TD3 */ + AM64X_IOPAD(0x01f0, PIN_OUTPUT, 2) /* (AA4) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */ + AM64X_IOPAD(0x01ec, PIN_OUTPUT, 2) /* (U5) PRG0_PRU1_GPO15.PRG0_RGMII2_TX_CTL */ + >; + }; + + icssg0_iep0_pins_default: icssg0-iep0-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01ac, PIN_OUTPUT, 2) /* (W1) PRG0_PRU0_GPO19.PRG0_IEP0_EDC_SYNC_OUT0 */ + >; + }; +}; + +&icssg0_mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pru_icssg0_mdio_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + + icssg0_phy00: ethernet-phy@0 { + reg = <0x0>; + }; + + icssg0_phy01: ethernet-phy@a { + reg = <0xa>; + }; +}; + +&icssg0_iep0 { + pinctrl-names = "default"; + pinctrl-0 = <&icssg0_iep0_pins_default>; +}; + +&main_gpio0 { + phy-line-hog { + gpio-hog; + gpios = <32 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "phy-hog-line"; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 88093ab74502..bc4347cf7114 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -601,6 +601,7 @@ reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 34bfa99bd4b8..d28a38c87f32 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -519,12 +519,14 @@ reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; cpsw3g_phy1: ethernet-phy@1 { reg = <1>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index e0262c2743eb..ca1300e13093 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -583,6 +583,7 @@ reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso deleted file mode 100644 index ae5e2b52594b..000000000000 --- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso +++ /dev/null @@ -1,146 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Kontron SMARC-sa67 board on the Kontron Eval Carrier 2.2. - * - * Copyright (c) 2025 Kontron Europe GmbH - */ - -/dts-v1/; -/plugin/; - -#include -#include "k3-pinctrl.h" - -&{/} { - pwm-fan { - compatible = "pwm-fan"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_fan_pins_default>; - interrupts-extended = <&main_gpio1 7 IRQ_TYPE_EDGE_FALLING>; - #cooling-cells = <2>; - pwms = <&epwm2 1 4000000 0>; - cooling-levels = <1 128 192 255>; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,widgets = - "Headphone", "Headphone Jack", - "Line", "Line Out Jack", - "Microphone", "Microphone Jack", - "Line", "Line In Jack"; - simple-audio-card,routing = - "Line Out Jack", "LINEOUTR", - "Line Out Jack", "LINEOUTL", - "Headphone Jack", "HPOUTR", - "Headphone Jack", "HPOUTL", - "IN1L", "Line In Jack", - "IN1R", "Line In Jack", - "Microphone Jack", "MICBIAS", - "IN2L", "Microphone Jack", - "IN2R", "Microphone Jack"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&dailink0_master>; - simple-audio-card,frame-master = <&dailink0_master>; - - simple-audio-card,cpu { - sound-dai = <&mcasp0>; - }; - - dailink0_master: simple-audio-card,codec { - sound-dai = <&wm8904>; - clocks = <&audio_refclk0>; - }; - }; - - cvcc_1p8v_i2s: regulator-carrier-0 { - compatible = "regulator-fixed"; - regulator-name = "V_1V8_S0_I2S"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - cvcc_1p8v_s0: regulator-carrier-1 { - compatible = "regulator-fixed"; - regulator-name = "V_1V8_S0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - cvcc_3p3v_s0: regulator-carrier-2 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_S0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&audio_refclk0 { - status = "okay"; -}; - -&epwm2 { - status = "okay"; -}; - -&main_pmx0 { - pwm_fan_pins_default: pwm-fan-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1ec, PIN_OUTPUT, 8) /* (A22) I2C1_SDA.EHRPWM2_B */ - J722S_IOPAD(0x194, PIN_INPUT, 0) /* (A25) MCASP0_AXR3.GPIO1_7 */ - >; - }; -}; - -&mcasp0 { - #sound-dai-cells = <0>; - status = "okay"; -}; - -&mcu_i2c0 { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - wm8904: audio-codec@1a { - #sound-dai-cells = <0>; - compatible = "wlf,wm8904"; - reg = <0x1a>; - clocks = <&audio_refclk0>; - clock-names = "mclk"; - AVDD-supply = <&cvcc_1p8v_i2s>; - CPVDD-supply = <&cvcc_1p8v_i2s>; - DBVDD-supply = <&cvcc_1p8v_i2s>; - DCVDD-supply = <&cvcc_1p8v_i2s>; - MICVDD-supply = <&cvcc_1p8v_i2s>; - }; -}; - -&mcu_spi0 { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <104000000>; - m25p,fast-read; - vcc-supply = <&cvcc_1p8v_s0>; - }; -}; - -&wkup_i2c0 { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* SMARC Carrier EEPROM */ - eeprom@57 { - compatible = "atmel,24c32"; - reg = <0x57>; - pagesize = <32>; - vcc-supply = <&cvcc_3p3v_s0>; - }; -}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts deleted file mode 100644 index 95234c8460ed..000000000000 --- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts +++ /dev/null @@ -1,1091 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Kontron SMARC-sAM67 module - * - * Copyright (c) 2025 Kontron Europe GmbH - */ - -/dts-v1/; - -#include -#include -#include -#include "k3-j722s.dtsi" -#include "k3-serdes.h" - -/ { - compatible = "kontron,sa67", "ti,j722s"; - model = "Kontron SMARC-sAM67"; - - aliases { - serial0 = &mcu_uart0; - serial1 = &main_uart0; - serial2 = &main_uart5; - serial3 = &wkup_uart0; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - rtc0 = &wkup_rtc0; - }; - - lcd0_backlight: backlight-1 { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&lcd0_backlight_pins_default>; - pwms = <&epwm1 0 50000 0>; - brightness-levels = <0 32 64 96 128 160 192 224 255>; - default-brightness-level = <8>; - enable-gpios = <&main_gpio0 29 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - lcd1_backlight: backlight-2 { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&lcd1_backlight_pins_default>; - pwms = <&epwm1 1 50000 0>; - brightness-levels = <0 32 64 96 128 160 192 224 255>; - default-brightness-level = <8>; - enable-gpios = <&main_gpio1 18 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - chosen { - stdout-path = "serial1:115200n8"; - }; - - connector-1 { - compatible = "gpio-usb-b-connector", "usb-b-connector"; - pinctrl-names = "default"; - pinctrl-0 = <&usb0_connector_pins_default>; - type = "micro"; - id-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; - vbus-supply = <&vcc_usb0_vbus>; - - port { - usb0_connector: endpoint { - remote-endpoint = <&usb0_hc>; - }; - }; - - }; - - memory@80000000 { - /* Filled in by bootloader */ - reg = <0x00000000 0x00000000 0x00000000 0x00000000>, - <0x00000000 0x00000000 0x00000000 0x00000000>; - device_type = "memory"; - bootph-pre-ram; - }; - - reserved_memory: reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - linux,cma { - compatible = "shared-dma-pool"; - reusable; - size = <0x00 0x10000000>; - linux,cma-default; - }; - - secure_tfa_ddr: tfa@9e780000 { - reg = <0x00 0x9e780000 0x00 0x80000>; - no-map; - }; - - secure_ddr: optee@9e800000 { - reg = <0x00 0x9e800000 0x00 0x01800000>; - no-map; - }; - - wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa0100000 0x00 0xf00000>; - no-map; - }; - }; - - vin_5p0: regulator-1 { - compatible = "regulator-fixed"; - regulator-name = "V_3V0_5V25_IN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - bootph-all; - }; - - vcc_3p3_s5: regulator-2 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_S5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vin_5p0>; - regulator-always-on; - regulator-boot-on; - bootph-all; - }; - - vcc_1p8_s5: regulator-3 { - compatible = "regulator-fixed"; - regulator-name = "V_1V8_S5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vin_5p0>; - regulator-always-on; - regulator-boot-on; - bootph-all; - }; - - vcc_3p3_s0: regulator-4 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_S0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3p3_s5>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpios = <&tps652g1 1 GPIO_ACTIVE_HIGH>; - bootph-all; - }; - - vcc_3p3_sd_s0: regulator-5 { - compatible = "regulator-fixed"; - regulator-name = "SDIO_PWR_EN"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_3p3_sd_s0_pins_default>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - gpios = <&main_gpio0 7 GPIO_ACTIVE_HIGH>; - bootph-all; - }; - - vcc_3p3_sd_vio_s0: regulator-6 { - compatible = "regulator-gpio"; - regulator-name = "V_3V3_1V8_SD_S0"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_3p3_sd_vio_s0_pins_default>; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3p3_s0>; - regulator-boot-on; - enable-active-high; - enable-gpios = <&main_gpio0 7 GPIO_ACTIVE_HIGH>; - gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; - states = <3300000 0x0>, - <1800000 0x1>; - bootph-all; - }; - - vcc_3p3_cam_s0: regulator-7 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_CAM_S0"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_3p3_cam_s0_pins_default>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3p3_s5>; - enable-active-high; - interrupts-extended = <&main_gpio1 30 IRQ_TYPE_EDGE_FALLING>; - bootph-all; - }; - - vcc_1p1_s0: regulator-8 { - compatible = "regulator-fixed"; - regulator-name = "V_1V1_S0"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc_1p1_s3>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - /* shared with V_0V75_0V85_CORE_S0 */ - gpios = <&tps652g1 4 GPIO_ACTIVE_HIGH>; - bootph-all; - }; - - vcc_0p85_vcore_s0: regulator-9 { - compatible = "regulator-fixed"; - regulator-name = "V_0V75_0V85_CORE_S0"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - vin-supply = <&vin_5p0>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpios = <&tps652g1 4 GPIO_ACTIVE_HIGH>; - bootph-all; - }; - - vcc_lcd0_panel: regulator-10 { - compatible = "regulator-fixed"; - regulator-name = "LCD0_VDD_EN"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_lcd0_panel_pins_default>; - enable-active-high; - gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; - }; - - vcc_lcd1_panel: regulator-11 { - compatible = "regulator-fixed"; - regulator-name = "LCD1_VDD_EN"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_lcd1_panel_pins_default>; - enable-active-high; - gpios = <&main_gpio1 19 GPIO_ACTIVE_HIGH>; - }; - - vcc_usb0_vbus: regulator-12 { - compatible = "regulator-fixed"; - regulator-name = "USB0_EN_OC#"; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_usb0_vbus_pins_default>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpios = <&main_gpio1 50 GPIO_ACTIVE_HIGH>; - }; -}; - -&audio_refclk0 { - pinctrl-names = "default"; - pinctrl-0 = <&audio_refclk0_pins_default>; - status = "disabled"; -}; - -&audio_refclk1 { - pinctrl-names = "default"; - pinctrl-0 = <&audio_refclk1_pins_default>; - status = "disabled"; -}; - -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&cpsw3g_pins_default>, <&rgmii1_pins_default>, - <&rgmii2_pins_default>; - status = "okay"; -}; - -&cpsw3g_mdio { - pinctrl-names = "default"; - pinctrl-0 = <&cpsw3g_mdio_pins_default>; - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <0>; - }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&cpsw_port1 { - phy-connection-type = "rgmii-id"; - phy-handle = <&phy0>; - nvmem-cells = <&base_mac_address 0>; - nvmem-cell-names = "mac-address"; - status = "okay"; -}; - -&main_gpio0 { - gpio-line-names = - "", "", "", "", "", "", "", "SOC_SDIO_PWR_EN", "VSD_SEL", - "RESET_OUT#", "I2C_MUX_RST#", "SPI_FLASH_CS#", "QPSI_CS0#", - "QSPI_CS1#", "BOOT_SEL1", "BRDCFG0", "BRDCFG1", "BRDCFG2", - "BRDCFG3", "BRDCFG4", "", "BRDREV0", "BRDREV1", "", "", "", "", - "", "", "LCD0_BKLT_EN", "LCD0_VDD_EN", "GBE_INT#", "DSI0_TE", - "CHARGING#", "USB0_OTG_ID", "PMIC_INT#", "RTC_INT#", - "EDP_BRIDGE_EN", "EDP_BRIDGE_IRQ#", "", "CHARGER_PRSNT#", "", - "", "", "", "BOOT_SEL2#", "CAM2_RST#", "CAM2_PWR#", "", - "CAM3_RST#", "CAM3_PWR#", "GPIO0", "GPIO1", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "GPIO10", "GPIO11", - "SLEEP#", "LID#"; - - bootph-all; - status = "okay"; -}; - -&main_gpio1 { - gpio-line-names = - "", "", "", "", "", "", "", "GPIO6", "GPIO7", "", "", "", "", - "GPIO8", "GPIO9", "PCIE_A_RST#", "", "BATLOW#", "LCD1_BKLT_EN", - "LCD1_VDD_EN", "", "", "", "", "GPIO2", "GPIO3", "", "", - "GPIO4", "GPIO5", "CAM_S0_FAULT#", "BOOT_SEL0#", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "SDIO_CD#", "", - "USB0_DRVVBUS", "USB1_DRVVBUS"; - - bootph-all; - status = "okay"; -}; - -/* I2C_LOCAL */ -&main_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; - clock-frequency = <100000>; - bootph-all; - status = "okay"; - - tps652g1: pmic@44 { - compatible = "ti,tps652g1"; - reg = <0x44>; - ti,primary-pmic; - system-power-controller; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "LPM_EN#", "EN_3V3_S0", "POWER_BTN#", "CARRIER_STBY#", - "EN_0V75_0V85_VCORE_S0", "PMIC_WAKEUP"; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins_default>; - interrupts-extended = <&main_gpio0 35 IRQ_TYPE_EDGE_FALLING>; - - buck1-supply = <&vin_5p0>; - buck2-supply = <&vin_5p0>; - buck3-supply = <&vin_5p0>; - buck4-supply = <&vin_5p0>; - ldo1-supply = <&vin_5p0>; - ldo2-supply = <&vin_5p0>; - ldo3-supply = <&vin_5p0>; - - bootph-all; - - regulators { - vcc_0p85_s0: buck1 { - regulator-name = "V_0V85_S0"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p1_s3: buck2 { - regulator-name = "V_1V1_S3"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p8_s0: buck3 { - regulator-name = "V_1V8_S0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p2_s0: buck4 { - regulator-name = "V_1V2_S0"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p8_vda_pll_s0: ldo1 { - regulator-name = "V_1V8_VDA_PLL_S0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p8_s3: ldo2 { - regulator-name = "V_1V8_S3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_1p8_ret_s5: ldo3 { - regulator-name = "V_1V8_RET_S5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; - - system-controller@4a { - compatible = "kontron,sa67mcu", "kontron,sl28cpld"; - reg = <0x4a>; - #address-cells = <1>; - #size-cells = <0>; - - watchdog@4 { - compatible = "kontron,sa67mcu-wdt", "kontron,sl28cpld-wdt"; - reg = <0x4>; - kontron,assert-wdt-timeout-pin; - }; - - hwmon@8 { - compatible = "kontron,sa67mcu-hwmon"; - reg = <0x8>; - }; - }; -}; - -/* I2C_CAM */ -&main_i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <100000>; - status = "okay"; - - i2c-mux@70 { - compatible = "nxp,pca9546"; - reg = <0x70>; - #address-cells = <1>; - #size-cells = <0>; - - pinctrl-names = "default"; - pinctrl-0 = <&i2c_mux_pins_default>; - - vdd-supply = <&vcc_1p8_s0>; - reset-gpios = <&main_gpio0 10 GPIO_ACTIVE_LOW>; - - i2c_cam0: i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - }; - - i2c_cam1: i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; - - i2c_cam2: i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - }; - - i2c_cam3: i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - }; - }; -}; - -/* I2C_LCD */ -&main_i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c3_pins_default>; - clock-frequency = <100000>; - status = "okay"; -}; - -&main_pmx0 { - audio_refclk0_pins_default: audio-refclk0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0c4, PIN_OUTPUT, 5) /* (W23) VOUT0_DATA3.AUDIO_EXT_REFCLK0 */ - >; - }; - - audio_refclk1_pins_default: audio-refclk1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ - >; - }; - - cpsw3g_mdio_pins_default: cpsw3g-mdio-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ - J722S_IOPAD(0x15c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ - >; - }; - - cpsw3g_pins_default: cpsw3g-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1b8, PIN_OUTPUT, 1) /* (C20) SPI0_CS1.CP_GEMAC_CPTS0_TS_COMP */ - >; - }; - - edp_bridge_pins_default: edp-bridge-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x098, PIN_OUTPUT, 7) /* (V21) GPMC0_WAIT0.GPIO0_37 */ - J722S_IOPAD(0x09c, PIN_INPUT, 7) /* (W26) GPMC0_WAIT1.GPIO0_38 */ - >; - }; - - i2c_mux_pins_default: i2c-mux-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x028, PIN_OUTPUT, 7) /* (M27) OSPI0_D7.GPIO0_10 */ - >; - }; - - lcd0_backlight_pins_default: lcd0-backlight-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x074, PIN_OUTPUT, 7) /* (V22) GPMC0_AD14.GPIO0_29 */ - J722S_IOPAD(0x110, PIN_OUTPUT, 4) /* (G27) MMC2_DAT1.EHRPWM1_A */ - >; - }; - - lcd1_backlight_pins_default: lcd1-backlight-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1c0, PIN_OUTPUT, 7) /* (E19) SPI0_D0.GPIO1_18 */ - J722S_IOPAD(0x114, PIN_OUTPUT, 4) /* (G26) MMC2_DAT0.EHRPWM1_B */ - >; - }; - - main_i2c0_pins_default: main-i2c0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1e0, PIN_INPUT, 0) /* (D23) I2C0_SCL */ - J722S_IOPAD(0x1e4, PIN_INPUT, 0) /* (B22) I2C0_SDA */ - >; - bootph-all; - }; - - main_i2c2_pins_default: main-i2c2-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0b0, PIN_INPUT, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */ - J722S_IOPAD(0x0b4, PIN_INPUT, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */ - >; - }; - - main_i2c3_pins_default: main-i2c3-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1d0, PIN_INPUT, 2) /* (E22) UART0_CTSn.I2C3_SCL */ - J722S_IOPAD(0x1d4, PIN_INPUT, 2) /* (B21) UART0_RTSn.I2C3_SDA */ - >; - }; - - main_i2c4_pins_default: main-i2c4-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0a8, PIN_INPUT, 1) /* (R27) GPMC0_CSn0.I2C4_SCL */ - J722S_IOPAD(0x0ac, PIN_INPUT, 1) /* (P21) GPMC0_CSn1.I2C4_SDA */ - >; - }; - - main_uart0_pins_default: main-uart0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1c8, PIN_INPUT, 0) /* (F19) UART0_RXD */ - J722S_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (F20) UART0_TXD */ - >; - bootph-all; - }; - - main_uart5_pins_default: main-uart5-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x108, PIN_INPUT, 3) /* (J27) MMC2_DAT3.UART5_RXD */ - J722S_IOPAD(0x10c, PIN_OUTPUT, 3) /* (H27) MMC2_DAT2.UART5_TXD */ - J722S_IOPAD(0x008, PIN_INPUT, 5) /* (L22) OSPI0_DQS.UART5_CTSn */ - J722S_IOPAD(0x004, PIN_OUTPUT, 5) /* (L23) OSPI0_LBCLKO.UART5_RTSn */ - >; - }; - - mcasp0_pins_default: mcasp0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1a4, PIN_INPUT, 0) /* (D25) MCASP0_ACLKX */ - J722S_IOPAD(0x1a8, PIN_INPUT, 0) /* (C26) MCASP0_AFSX */ - J722S_IOPAD(0x1a0, PIN_INPUT, 0) /* (F23) MCASP0_AXR0 */ - J722S_IOPAD(0x19c, PIN_OUTPUT, 0) /* (B25) MCASP0_AXR1 */ - >; - }; - - mcasp2_pins_default: mcasp2-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x070, PIN_INPUT, 3) /* (V24) GPMC0_AD13.MCASP2_ACLKX */ - J722S_IOPAD(0x06c, PIN_INPUT, 3) /* (V26) GPMC0_AD12.MCASP2_AFSX */ - J722S_IOPAD(0x05c, PIN_INPUT, 3) /* (U27) GPMC0_AD8.MCASP2_AXR0 */ - J722S_IOPAD(0x060, PIN_OUTPUT, 3) /* (U26) GPMC0_AD9.MCASP2_AXR1 */ - >; - }; - - oldi0_pins_default: oldi0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x260, PIN_OUTPUT, 0) /* (AF23) OLDI0_A0N */ - J722S_IOPAD(0x25c, PIN_OUTPUT, 0) /* (AG24) OLDI0_A0P */ - J722S_IOPAD(0x268, PIN_OUTPUT, 0) /* (AG22) OLDI0_A1N */ - J722S_IOPAD(0x264, PIN_OUTPUT, 0) /* (AG23) OLDI0_A1P */ - J722S_IOPAD(0x270, PIN_OUTPUT, 0) /* (AB20) OLDI0_A2N */ - J722S_IOPAD(0x26c, PIN_OUTPUT, 0) /* (AB21) OLDI0_A2P */ - J722S_IOPAD(0x278, PIN_OUTPUT, 0) /* (AG20) OLDI0_A3N */ - J722S_IOPAD(0x274, PIN_OUTPUT, 0) /* (AG21) OLDI0_A3P */ - J722S_IOPAD(0x2a0, PIN_OUTPUT, 0) /* (AF21) OLDI0_CLK0N */ - J722S_IOPAD(0x29c, PIN_OUTPUT, 0) /* (AE20) OLDI0_CLK0P */ - >; - }; - - oldi1_pins_default: oldi1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x280, PIN_OUTPUT, 0) /* (AD21) OLDI0_A4N */ - J722S_IOPAD(0x27c, PIN_OUTPUT, 0) /* (AC21) OLDI0_A4P */ - J722S_IOPAD(0x288, PIN_OUTPUT, 0) /* (AF19) OLDI0_A5N */ - J722S_IOPAD(0x284, PIN_OUTPUT, 0) /* (AF18) OLDI0_A5P */ - J722S_IOPAD(0x290, PIN_OUTPUT, 0) /* (AG17) OLDI0_A6N */ - J722S_IOPAD(0x28c, PIN_OUTPUT, 0) /* (AG18) OLDI0_A6P */ - J722S_IOPAD(0x298, PIN_OUTPUT, 0) /* (AB19) OLDI0_A7N */ - J722S_IOPAD(0x294, PIN_OUTPUT, 0) /* (AA20) OLDI0_A7P */ - J722S_IOPAD(0x2a8, PIN_OUTPUT, 0) /* (AD20) OLDI0_CLK1N */ - J722S_IOPAD(0x2a4, PIN_OUTPUT, 0) /* (AE19) OLDI0_CLK1P */ - >; - }; - - ospi0_pins_default: ospi0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */ - J722S_IOPAD(0x02c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */ - J722S_IOPAD(0x030, PIN_OUTPUT, 0) /* (K23) OSPI0_CSn1 */ - J722S_IOPAD(0x034, PIN_OUTPUT, 0) /* (K22) OSPI0_CSn2 */ - J722S_IOPAD(0x00c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */ - J722S_IOPAD(0x010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */ - J722S_IOPAD(0x014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */ - J722S_IOPAD(0x018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */ - >; - bootph-all; - }; - - pcie0_rc_pins_default: pcie0-rc-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x2ac, PIN_OUTPUT, 0) /* (F25) PCIE0_CLKREQn */ - J722S_IOPAD(0x1b4, PIN_OUTPUT, 7) /* (B20) SPI0_CS0.GPIO1_15 */ - >; - }; - - pmic_irq_pins_default: pmic-irq-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x090, PIN_INPUT, 7) /* (P27) GPMC0_BE0n_CLE.GPIO0_35 */ - >; - }; - - rgmii1_pins_default: rgmii1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x14c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ - J722S_IOPAD(0x150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */ - J722S_IOPAD(0x154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */ - J722S_IOPAD(0x158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */ - J722S_IOPAD(0x148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */ - J722S_IOPAD(0x144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */ - J722S_IOPAD(0x134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */ - J722S_IOPAD(0x138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */ - J722S_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */ - J722S_IOPAD(0x140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */ - J722S_IOPAD(0x130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ - J722S_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ - >; - }; - - rgmii2_pins_default: rgmii2-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0f8, PIN_INPUT, 2) /* (AB24) VOUT0_HSYNC.RGMII2_RD0 */ - J722S_IOPAD(0x0fc, PIN_INPUT, 2) /* (AC27) VOUT0_DE.RGMII2_RD1 */ - J722S_IOPAD(0x100, PIN_INPUT, 2) /* (AB23) VOUT0_VSYNC.RGMII2_RD2 */ - J722S_IOPAD(0x104, PIN_INPUT, 2) /* (AC26) VOUT0_PCLK.RGMII2_RD3 */ - J722S_IOPAD(0x0f4, PIN_INPUT, 2) /* (AB27) VOUT0_DATA15.RGMII2_RXC */ - J722S_IOPAD(0x0f0, PIN_INPUT, 2) /* (AB26) VOUT0_DATA14.RGMII2_RX_CTL */ - J722S_IOPAD(0x0e0, PIN_OUTPUT, 2) /* (AA25) VOUT0_DATA10.RGMII2_TD0 */ - J722S_IOPAD(0x0e4, PIN_OUTPUT, 2) /* (AB25) VOUT0_DATA11.RGMII2_TD1 */ - J722S_IOPAD(0x0e8, PIN_OUTPUT, 2) /* (AA23) VOUT0_DATA12.RGMII2_TD2 */ - J722S_IOPAD(0x0ec, PIN_OUTPUT, 2) /* (AA22) VOUT0_DATA13.RGMII2_TD3 */ - J722S_IOPAD(0x0dc, PIN_OUTPUT, 2) /* (AA27) VOUT0_DATA9.RGMII2_TXC */ - J722S_IOPAD(0x0d8, PIN_OUTPUT, 2) /* (AA24) VOUT0_DATA8.RGMII2_TX_CTL */ - >; - }; - - rtc_pins_default: rtc-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x094, PIN_INPUT, 7) /* (P26) GPMC0_BE1n.GPIO0_36 */ - >; - }; - - sdhci1_pins_default: sdhci1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x23c, PIN_INPUT, 0) /* (H22) MMC1_CMD */ - J722S_IOPAD(0x234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */ - J722S_IOPAD(0x230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */ - J722S_IOPAD(0x22c, PIN_INPUT, 0) /* (H20) MMC1_DAT1 */ - J722S_IOPAD(0x228, PIN_INPUT, 0) /* (J23) MMC1_DAT2 */ - J722S_IOPAD(0x224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */ - J722S_IOPAD(0x240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */ - J722S_IOPAD(0x244, PIN_INPUT, 0) /* (A24) MMC1_SDWP */ - >; - bootph-all; - }; - - usb0_connector_pins_default: usb0-connector-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x08c, PIN_INPUT_PULLUP, 7) /* (N23) GPMC0_WEn.GPIO0_34 */ - >; - }; - - usb1_pins_default: usb1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x258, PIN_OUTPUT, 0) /* (B27) USB1_DRVVBUS */ - >; - }; - - vcc_3p3_sd_s0_pins_default: vcc-3p3-sd-s0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x01c, PIN_OUTPUT, 7) /* (L21) OSPI0_D4.GPIO0_7 */ - >; - bootph-all; - }; - - vcc_3p3_sd_vio_s0_pins_default: vcc-3p3-sd-vio-s0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x020, PIN_OUTPUT, 7) /* (M26) OSPI0_D5.GPIO0_8 */ - >; - bootph-all; - }; - - vcc_3p3_cam_s0_pins_default: vcc-3p3-cam-s0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1f0, PIN_OUTPUT, 7) /* (A23) EXT_REFCLK1.GPIO1_30 */ - >; - }; - - vcc_lcd0_panel_pins_default: vcc-lcd0-panel-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x078, PIN_OUTPUT, 7) /* (V23) GPMC0_AD15.GPIO0_30 */ - >; - }; - - vcc_lcd1_panel_pins_default: vcc-lcd1-panel-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x1c4, PIN_OUTPUT, 7) /* (E20) SPI0_D1.GPIO1_19 */ - >; - }; - - vcc_usb0_vbus_pins_default: vcc-usb0-vbus-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ - >; - }; -}; - -/* SER1 */ -&main_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; - bootph-all; - status = "okay"; -}; - -/* SER2 */ -&main_uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&main_uart5_pins_default>; - bootph-all; - status = "okay"; -}; - -/* I2S0 */ -&mcasp0 { - #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&mcasp0_pins_default>; - op-mode = <0>; /* I2S */ - tdm-slots = <2>; - serial-dir = <2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; -}; - -/* I2S2 */ -&mcasp2 { - #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&mcasp2_pins_default>; - op-mode = <0>; /* I2S */ - tdm-slots = <2>; - serial-dir = <2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; -}; - -/* CAN0 */ -&mcu_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_mcan0_pins_default>; - status = "okay"; -}; - -/* CAN1 */ -&mcu_mcan1 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_mcan1_pins_default>; - status = "okay"; -}; - -&mcu_gpio0 { - gpio-line-names = - "", "", "", "", "", "", "", "", "", "", "", /* 10 */ "GPIO12", - "MCU_INT#", "", "", "", "", "", "", "", "", "", "", "GPIO13"; -}; - -/* I2C_GP */ -&mcu_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_i2c0_pins_default>; - clock-frequency = <100000>; - status = "okay"; - - /* SMARC Module EEPROM */ - eeprom@50 { - compatible = "atmel,24c32"; - reg = <0x50>; - pagesize = <32>; - vcc-supply = <&vcc_1p8_s0>; - }; -}; - -&mcu_pmx0 { - mcu_i2c0_pins_default: mcu-i2c0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x044, PIN_INPUT, 0) /* (B13) MCU_I2C0_SCL */ - J722S_MCU_IOPAD(0x048, PIN_INPUT, 0) /* (E11) MCU_I2C0_SDA */ - >; - }; - mcu_mcan0_pins_default: mcu-mcan0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */ - J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */ - >; - }; - - mcu_mcan1_pins_default: mcu-mcan1-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */ - J722S_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (C1) MCU_MCAN1_TX */ - >; - }; - - mcu_uart0_pins_default: mcu-uart0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x014, PIN_INPUT, 0) /* (B8) MCU_UART0_RXD */ - J722S_MCU_IOPAD(0x018, PIN_OUTPUT, 0) /* (B4) MCU_UART0_TXD */ - J722S_MCU_IOPAD(0x01c, PIN_INPUT, 0) /* (B5) MCU_UART0_CTSn */ - J722S_MCU_IOPAD(0x020, PIN_OUTPUT, 0) /* (C5) MCU_UART0_RTSn */ - >; - bootph-all; - }; - - mcu_spi0_pins_default: mcu-spi0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x008, PIN_OUTPUT, 0) /* (A9) MCU_SPI0_CLK */ - J722S_MCU_IOPAD(0x000, PIN_OUTPUT, 0) /* (C12) MCU_SPI0_CS0 */ - J722S_MCU_IOPAD(0x004, PIN_OUTPUT, 0) /* (A10) MCU_SPI0_CS1 */ - J722S_MCU_IOPAD(0x00c, PIN_INPUT, 0) /* (B12) MCU_SPI0_D0 */ - J722S_MCU_IOPAD(0x010, PIN_OUTPUT, 0) /* (C11) MCU_SPI0_D1 */ - >; - }; - - wkup_uart0_pins_default: wkup-uart0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B3) WKUP_UART0_RXD */ - J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_TXD */ - >; - bootph-all; - }; - - wkup_i2c0_pins_default: wkup-i2c0-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x04c, PIN_INPUT, 0) /* (B9) WKUP_I2C0_SCL */ - J722S_MCU_IOPAD(0x050, PIN_INPUT, 0) /* (D11) WKUP_I2C0_SDA */ - >; - }; -}; - -/* SPI0 */ -&mcu_spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_spi0_pins_default>; -}; - -/* SER0 */ -&mcu_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_uart0_pins_default>; - bootph-all; - status = "okay"; -}; - -/* QSPI0 */ -&ospi0 { - pinctrl-0 = <&ospi0_pins_default>; - pinctrl-names = "default"; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <104000000>; - spi-rx-bus-width = <2>; - spi-tx-bus-width = <2>; - m25p,fast-read; - cdns,tshsl-ns = <60>; - cdns,tsd2d-ns = <60>; - cdns,tchsh-ns = <60>; - cdns,tslch-ns = <60>; - cdns,read-delay = <3>; - vcc-supply = <&vcc_1p8_s0>; - bootph-all; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - reg = <0x000000 0x400000>; - label = "failsafe bootloader"; - read-only; - }; - }; - - otp-1 { - compatible = "user-otp"; - - nvmem-layout { - compatible = "kontron,sa67-vpd", "kontron,sl28-vpd"; - - serial_number: serial-number { - }; - - base_mac_address: base-mac-address { - #nvmem-cell-cells = <1>; - }; - }; - }; - }; -}; - -&pcie0_rc { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_rc_pins_default>; - - /* - * This is low active, but the driver itself is broken and already - * inverts the logic. - */ - reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; - phys = <&serdes1_pcie>; - phy-names = "pcie-phy"; - status = "okay"; -}; - -&sdhci0 { - disable-wp; - bootph-all; - ti,driver-strength-ohm = <50>; - status = "okay"; -}; - -/* SDIO */ -&sdhci1 { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci1_pins_default>; - vmmc-supply = <&vcc_3p3_sd_s0>; - vqmmc-supply = <&vcc_3p3_sd_vio_s0>; - bootph-all; - cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; - cd-debounce-delay-ms = <100>; - ti,fails-without-test-cd; - ti,driver-strength-ohm = <50>; - status = "okay"; -}; - -&serdes_ln_ctrl { - idle-states = , - ; -}; - -&serdes_wiz0 { - status = "okay"; -}; - -&serdes_wiz1 { - status = "okay"; -}; - -&serdes0 { - serdes0_usb3: phy@0 { - reg = <0>; - #phy-cells = <0>; - resets = <&serdes_wiz0 1>; - cdns,num-lanes = <1>; - cdns,phy-type = ; - }; -}; - -&serdes1 { - serdes1_pcie: phy@0 { - reg = <0>; - #phy-cells = <0>; - resets = <&serdes_wiz1 1>; - cdns,num-lanes = <1>; - cdns,phy-type = ; - }; -}; - -&usb0 { - /* dual role is implemented but not a full featured OTG */ - adp-disable; - hnp-disable; - srp-disable; - dr_mode = "otg"; - usb-role-switch; - role-switch-default-mode = "peripheral"; - status = "okay"; - - port { - usb0_hc: endpoint { - remote-endpoint = <&usb0_connector>; - }; - }; -}; - -&usb0_phy_ctrl { - /* - * Keep this node in the SPL to be able to use the USB controller to - * boot via DFU. - */ - bootph-all; -}; - -&usb1 { - pinctrl-names = "default"; - pinctrl-0 = <&usb1_pins_default>; - - dr_mode = "host"; - maximum-speed = "super-speed"; - phys = <&serdes0_usb3>; - phy-names = "cdns3,usb3-phy"; -}; - -&usbss0 { - ti,vbus-divider; - status = "okay"; -}; - -&usbss1 { - ti,vbus-divider; - status = "okay"; -}; - -/* I2C_PM */ -&wkup_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&wkup_i2c0_pins_default>; - clock-frequency = <100000>; - status = "okay"; -}; - -/* SER3 */ -&wkup_uart0 { - /* WKUP UART0 is used by Device Manager firmware */ - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - bootph-all; - status = "reserved"; -}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso deleted file mode 100644 index 5dfb0b8f10d2..000000000000 --- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Second ethernet port GBE1. - * - * Copyright (c) 2025 Kontron Europe GmbH - */ - -/dts-v1/; -/plugin/; - -&cpsw3g_mdio { - #address-cells = <1>; - #size-cells = <0>; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&cpsw_port2 { - phy-connection-type = "rgmii-id"; - phy-handle = <&phy1>; - nvmem-cells = <&base_mac_address 1>; - nvmem-cell-names = "mac-address"; - status = "okay"; -}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso deleted file mode 100644 index a6ae758e0b3a..000000000000 --- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso +++ /dev/null @@ -1,61 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * SMARC GPIOs. - * - * Copyright (c) 2025 Kontron Europe GmbH - */ - -/dts-v1/; -/plugin/; - -#include -#include "k3-pinctrl.h" - -&main_gpio0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_gpio0_pins_default>; -}; - -&main_gpio1 { - pinctrl-names = "default"; - pinctrl-0 = <&main_gpio1_pins_default>; -}; - -&main_pmx0 { - main_gpio0_pins_default: main-gpio0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */ - J722S_IOPAD(0x0d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */ - J722S_IOPAD(0x118, PIN_INPUT, 7) /* (H26) MMC2_CLK.GPIO0_69 */ - J722S_IOPAD(0x120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ - >; - }; - - main_gpio1_pins_default: main-gpio1-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x194, PIN_INPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */ - J722S_IOPAD(0x198, PIN_INPUT, 7) /* (A26) MCASP0_AXR2.GPIO1_8 */ - J722S_IOPAD(0x1ac, PIN_INPUT, 7) /* (C27) MCASP0_AFSR.GPIO1_13 */ - J722S_IOPAD(0x1b0, PIN_INPUT, 7) /* (F24) MCASP0_ACLKR.GPIO1_14 */ - J722S_IOPAD(0x1d8, PIN_INPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */ - J722S_IOPAD(0x1dc, PIN_INPUT, 7) /* (C22) MCAN0_RX.GPIO1_25 */ - J722S_IOPAD(0x1e8, PIN_INPUT, 7) /* (C24) I2C1_SCL.GPIO1_28 */ - J722S_IOPAD(0x1ec, PIN_INPUT, 7) /* (A22) I2C1_SDA.GPIO1_29 */ - >; - }; -}; - -&mcu_gpio0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_gpio0_pins_default>; -}; - -&mcu_pmx0 { - mcu_gpio0_pins_default: mcu-gpio0-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x02c, PIN_INPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */ - J722S_IOPAD(0x084, PIN_INPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */ - >; - }; - -}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso deleted file mode 100644 index 0a3e9f614c4c..000000000000 --- a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Microcrystal RV8263 RTC variant. - * - * Copyright (c) 2025 Kontron Europe GmbH - */ - -/dts-v1/; -/plugin/; - -#include - -&{/} { - aliases { - rtc0 = "/bus@f0000/i2c@20000000/rtc@51"; /* &rtc */ - rtc1 = "/bus@f0000/bus@b00000/rtc@2b1f0000"; /* &wkup_rtc0 */ - }; -}; - -&main_i2c0 { - #address-cells = <1>; - #size-cells = <0>; - - rtc: rtc@51 { - compatible = "microcrystal,rv8263"; - reg = <0x51>; - pinctrl-names = "default"; - pinctrl-0 = <&rtc_pins_default>; - interrupts-extended = <&main_gpio0 36 IRQ_TYPE_EDGE_FALLING>; - }; -}; diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso new file mode 100644 index 000000000000..9eb28aa9e8ef --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2026 PHYTEC Messtechnik GmbH + * Author: Dominik Haller + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include "k3-pinctrl.h" + +&{/} { + backlight_lvds: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <6>; + enable-gpios = <&exp2 12 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&backlight_pins_default>; + power-supply = <&bl_12v>; + pwms = <&main_ehrpwm0 1 44000 0>; + }; + + bl_12v: regulator-backlight { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&exp2 13 GPIO_ACTIVE_HIGH>; + regulator-name = "BL_12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + panel-lvds { + compatible = "powertip,ph128800t006-zhc01"; + backlight = <&backlight_lvds>; + power-supply = <&vcc_5v0>; + + port { + panel_in: endpoint { + remote-endpoint = <&panel_bridge_out>; + }; + }; + }; +}; + +&main_pmx0 { + backlight_pins_default: backlight-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x064, PIN_OUTPUT, 9) /* (W28) MCAN0_TX.EHRPWM0_B */ + >; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_out: endpoint { + remote-endpoint = <&panel_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&main_ehrpwm0 { + status = "okay"; +}; + +&sn65dsi83 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + panel_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + panel_bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-peb-av-15.dtso b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-peb-av-15.dtso new file mode 100644 index 000000000000..92007bfd5d53 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-peb-av-15.dtso @@ -0,0 +1,191 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2026 PHYTEC Messtechnik GmbH + * Author: Dominik Haller + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&{/} { + audio_refclk1: audio-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + }; + + hdmi: hdmi-connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "a"; + ddc-i2c-bus = <&main_i2c2>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <<8912b_out>; + }; + }; + }; + + reg_audio_3v3: regulator-audio-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3V3_AUDIO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_audio_1v8: regulator-audio-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC1V8_AUDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "PEB-AV-15"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Microphone", "Mic Jack"; + simple-audio-card,routing = + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "MIC3R", "Mic Jack", + "Mic Jack", "Mic Bias"; + simple-audio-card,format = "dsp_b"; + simple-audio-card,bitclock-inversion; + simple-audio-card,bitclock-master = <&link0_codec>; + simple-audio-card,frame-master = <&link0_codec>; + + link0_cpu: simple-audio-card,cpu { + sound-dai = <&mcasp0>; + }; + + link0_codec: simple-audio-card,codec { + sound-dai = <&audio_codec>; + clocks = <&audio_refclk1>; + }; + }; + +}; + +&dphy_tx1 { + status = "okay"; +}; + +&dsi1 { + status = "okay"; +}; + +&dsi1_ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dsi1_out: endpoint { + remote-endpoint = <<8912b_in>; + }; + }; + + port@1 { + reg = <1>; + dsi1_in: endpoint { + remote-endpoint = <&dpi3_out>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@3 { + reg = <3>; + dpi3_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; +}; + +&mcasp0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins>; + + #sound-dai-cells = <0>; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + + /* 4 serializers */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 2 0 0 1 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + + tx-num-evt = <32>; + rx-num-evt = <32>; + status = "okay"; +}; + +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + audio_codec: audio-codec@18 { + compatible = "ti,tlv320aic3007"; + reg = <0x18>; + #sound-dai-cells = <0>; + ai3x-micbias-vg = <2>; + AVDD-supply = <®_audio_3v3>; + IOVDD-supply = <®_audio_3v3>; + DRVDD-supply = <®_audio_3v3>; + DVDD-supply = <®_audio_1v8>; + }; + + bridge@48 { + compatible = "lontium,lt8912b"; + reg = <0x48>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lt8912b_in: endpoint { + data-lanes = <0 1 2 3>; + remote-endpoint = <&dsi1_out>; + }; + }; + + port@1 { + reg = <1>; + lt8912b_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; + +&main_pmx0 { + mcasp0_pins: mcasp0-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x03c, PIN_INPUT, 1) /* (U27) WCLK, MCASP0_AFSX.MCASP0_AFSX */ + J721S2_IOPAD(0x038, PIN_INPUT, 1) /* (AB28) BCLK, MCASP0_ACLKX.MCASP0_ACLKX */ + J721S2_IOPAD(0x040, PIN_OUTPUT, 1) /* (AC28) DOUT, MCASP0_AXR0.MCASP0_AXR0 */ + J721S2_IOPAD(0x07c, PIN_INPUT, 1) /* (T27) DIN, MCASP0_AXR3.MCASP0_AXR3 */ + >; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts index e221ccb30e95..225fe7a7803b 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts @@ -298,6 +298,23 @@ }; }; +&dss { + /* + * VP0 - Displayport + * VP1 - DPI0 + * VP2 - DSI0 + * VP3 - DPI1/DSI1 + */ + assigned-clocks = <&k3_clks 158 2>, + <&k3_clks 158 5>, + <&k3_clks 158 14>, + <&k3_clks 158 18>; + assigned-clock-parents = <&k3_clks 158 3>, + <&k3_clks 158 7>, + <&k3_clks 158 16>, + <&k3_clks 158 22>; +}; + &i2c_som_rtc { trickle-resistor-ohms = <3000>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi index 0ff511028f81..ab87767419fe 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi @@ -151,6 +151,12 @@ >; bootph-all; }; + + wkup_sn65dsi83_pins_default: wkup-sn65dsi83-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x084, PIN_OUTPUT, 7) /* (F25) WKUP_GPIO0_11 */ + >; + }; }; &main_cpsw { @@ -183,6 +189,17 @@ pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; + sn65dsi83: bridge@2d { + compatible = "ti,sn65dsi83"; + reg = <0x2d>; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_sn65dsi83_pins_default>; + enable-gpios = <&wkup_gpio0 11 GPIO_ACTIVE_LOW>; + vcc-supply = <&bucka4>; + /* enabled in panel overlay */ + status = "disabled"; + }; + temperature-sensor@48 { compatible = "ti,tmp102"; reg = <0x48>; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts index ec8ff4587715..dc0d3cf2f985 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts @@ -26,7 +26,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_21_dp>; /* Aquila GPIO_21_DP (AQUILA B57) */ - gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + gpio = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts index f48601ae38b7..d3677c2c2547 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts @@ -33,7 +33,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_21_dp>; /* Aquila GPIO_21_DP (AQUILA B57) */ - gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + gpio = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 3e5efdfe87f1..54dea36b153b 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -331,6 +331,7 @@ reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 628ff89dd72f..67fde5667b8d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -25,9 +25,8 @@ }; }; - scm_conf: scm-conf@100000 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00 0x00100000 0x00 0x1c000>; + scm_conf: bus@100000 { + compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x1c000>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 47702fb279a4..53e7fbcef52b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -777,6 +777,7 @@ reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; + ti,min-output-impedance; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 4fea99519113..19c5157510b2 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -530,6 +530,48 @@ cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <2>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "qspi.tiboot3"; + reg = <0x0 0x80000>; + }; + + partition@80000 { + label = "qspi.tispl"; + reg = <0x80000 0x200000>; + }; + + partition@280000 { + label = "qspi.u-boot"; + reg = <0x280000 0x400000>; + }; + + partition@680000 { + label = "qspi.env"; + reg = <0x680000 0x40000>; + }; + + partition@6c0000 { + label = "qspi.env.backup"; + reg = <0x6c0000 0x40000>; + }; + + partition@800000 { + label = "qspi.rootfs"; + reg = <0x800000 0x37c0000>; + }; + + partition@3fc0000 { + label = "qspi.phypattern"; + reg = <0x3fc0000 0x40000>; + bootph-all; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 80c51b11ac9f..1228ac5711bf 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -37,9 +37,8 @@ }; }; - scm_conf: syscon@104000 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00 0x00104000 0x00 0x18000>; + scm_conf: bus@104000 { + compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x00 0x00 0x00104000 0x18000>; @@ -175,7 +174,7 @@ }; main_pmx0: pinctrl@11c000 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x0 0x11c000 0x0 0x120>; #pinctrl-cells = <1>; @@ -185,7 +184,7 @@ /* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */ main_timerio_input: pinctrl@104200 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x00 0x104200 0x00 0x50>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -194,7 +193,7 @@ /* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */ main_timerio_output: pinctrl@104280 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x00 0x104280 0x00 0x20>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -1815,6 +1814,19 @@ status = "disabled"; }; + dphy_tx1: phy@4481000 { + compatible = "ti,j721e-dphy"; + reg = <0x00 0x04481000 0x00 0x00001000>; + clocks = <&k3_clks 364 8>, <&k3_clks 364 14>; + clock-names = "psm", "pll_ref"; + #phy-cells = <0>; + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 364 14>; + assigned-clock-parents = <&k3_clks 364 15>; + assigned-clock-rates = <19200000>; + status = "disabled"; + }; + dsi0: dsi@4800000 { compatible = "ti,j721e-dsi"; reg = <0x00 0x04800000 0x00 0x00100000>, @@ -1841,6 +1853,32 @@ }; }; + dsi1: dsi@4900000 { + compatible = "ti,j721e-dsi"; + reg = <0x00 0x04900000 0x00 0x00100000>, + <0x00 0x04720000 0x00 0x00000100>; + clocks = <&k3_clks 155 4>, <&k3_clks 155 1>; + clock-names = "dsi_p_clk", "dsi_sys_clk"; + power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>; + interrupts = ; + phys = <&dphy_tx1>; + phy-names = "dphy"; + status = "disabled"; + + dsi1_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + }; + }; + dss: dss@4a00000 { compatible = "ti,j721e-dss"; reg = <0x00 0x04a00000 0x00 0x10000>, /* common_m */ diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 32ee8031cfcb..27b8e7440246 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -76,7 +76,7 @@ }; wkup_pmx0: pinctrl@4301c000 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c000 0x00 0x034>; #pinctrl-cells = <1>; @@ -85,7 +85,7 @@ }; wkup_pmx1: pinctrl@4301c038 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c038 0x00 0x02c>; #pinctrl-cells = <1>; @@ -94,7 +94,7 @@ }; wkup_pmx2: pinctrl@4301c068 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c068 0x00 0x120>; #pinctrl-cells = <1>; @@ -103,7 +103,7 @@ }; wkup_pmx3: pinctrl@4301c190 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c190 0x00 0x004>; #pinctrl-cells = <1>; @@ -113,7 +113,7 @@ /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ mcu_timerio_input: pinctrl@40f04200 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x00 0x40f04200 0x00 0x28>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -124,7 +124,7 @@ /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */ mcu_timerio_output: pinctrl@40f04280 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x00 0x40f04280 0x00 0x28>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index 9ee5d0c8ffd1..ddf20e44f0ea 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -154,6 +154,19 @@ }; }; + main_i2c4: i2c@fe80000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x0fe80000 0x00 0x100>; + interrupt-parent = <&main_gpio_intr>; + interrupts = <178 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 257 2>; + clock-names = "fck"; + status = "disabled"; + }; + ti_csi2rx1: ticsi2rx@30122000 { compatible = "ti,j721e-csi2rx-shim"; reg = <0x00 0x30122000 0x00 0x1000>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index 059c65ece183..1b36dcf37925 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -160,7 +160,8 @@ <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */ <0x00 0x0fd20000 0x00 0x0fd20000 0x00 0x00000100>, /* JPEGENC0_CORE */ <0x00 0x0fd20200 0x00 0x0fd20200 0x00 0x00000200>, /* JPEGENC0_CORE_MMU */ - <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */ + <0x00 0x0fe00000 0x00 0x0fe00000 0x00 0x000f0400>, /* Third peripheral window */ + <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Fourth peripheral window */ <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */ <0x00 0x301c0000 0x00 0x301c0000 0x00 0x00001000>, /* DPHY-TX */ <0x00 0x30101000 0x00 0x30101000 0x00 0x00080100>, /* CSI window */ diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h index dc8e03ae74c8..4491898d8294 100644 --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h @@ -8,23 +8,23 @@ #ifndef DTS_ARM64_TI_K3_PINCTRL_H #define DTS_ARM64_TI_K3_PINCTRL_H -#define WKUP_LVL_EN_SHIFT (7) -#define WKUP_LVL_POL_SHIFT (8) +#define WKUP_LVL_EN_SHIFT (7) +#define WKUP_LVL_POL_SHIFT (8) +#define DEBOUNCE_SHIFT (11) #define ST_EN_SHIFT (14) +#define FORCE_DS_EN_SHIFT (15) #define PULLUDEN_SHIFT (16) #define PULLTYPESEL_SHIFT (17) #define RXACTIVE_SHIFT (18) -#define DRV_STR_SHIFT (19) -#define ISO_OVERRIDE_EN_SHIFT (22) -#define ISO_BYPASS_EN_SHIFT (23) -#define DEBOUNCE_SHIFT (11) -#define FORCE_DS_EN_SHIFT (15) +#define DRV_STR_SHIFT (19) +#define ISO_OVERRIDE_EN_SHIFT (22) +#define ISO_BYPASS_EN_SHIFT (23) #define DS_EN_SHIFT (24) #define DS_OUT_DIS_SHIFT (25) #define DS_OUT_VAL_SHIFT (26) #define DS_PULLUD_EN_SHIFT (27) #define DS_PULLTYPE_SEL_SHIFT (28) -#define WKUP_EN_SHIFT (29) +#define WKUP_EN_SHIFT (29) /* Schmitt trigger configuration */ #define ST_DISABLE (0 << ST_EN_SHIFT) @@ -39,28 +39,28 @@ #define INPUT_EN (1 << RXACTIVE_SHIFT) #define INPUT_DISABLE (0 << RXACTIVE_SHIFT) -#define DS_PULL_DISABLE (1 << DS_PULLUD_EN_SHIFT) -#define DS_PULL_ENABLE (0 << DS_PULLUD_EN_SHIFT) +#define DS_PULL_DISABLE (1 << DS_PULLUD_EN_SHIFT) +#define DS_PULL_ENABLE (0 << DS_PULLUD_EN_SHIFT) -#define DS_PULL_UP (1 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE) -#define DS_PULL_DOWN (0 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE) +#define DS_PULL_UP (1 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE) +#define DS_PULL_DOWN (0 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE) -#define DS_STATE_EN (1 << DS_EN_SHIFT) -#define DS_STATE_DISABLE (0 << DS_EN_SHIFT) +#define DS_STATE_EN (1 << DS_EN_SHIFT) +#define DS_STATE_DISABLE (0 << DS_EN_SHIFT) -#define DS_INPUT_EN (1 << DS_OUT_DIS_SHIFT | DS_STATE_EN) -#define DS_INPUT_DISABLE (0 << DS_OUT_DIS_SHIFT | DS_STATE_EN) +#define DS_INPUT_EN (1 << DS_OUT_DIS_SHIFT | DS_STATE_EN) +#define DS_INPUT_DISABLE (0 << DS_OUT_DIS_SHIFT | DS_STATE_EN) -#define DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT) -#define DS_OUT_VALUE_ONE (1 << DS_OUT_VAL_SHIFT) +#define DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT) +#define DS_OUT_VALUE_ONE (1 << DS_OUT_VAL_SHIFT) /* Configuration to enable wake-up on pin activity */ -#define WKUP_ENABLE (1 << WKUP_EN_SHIFT) -#define WKUP_DISABLE (0 << WKUP_EN_SHIFT) -#define WKUP_ON_LEVEL (1 << WKUP_LVL_EN_SHIFT) -#define WKUP_ON_EDGE (0 << WKUP_LVL_EN_SHIFT) -#define WKUP_LEVEL_LOW (0 << WKUP_LVL_POL_SHIFT) -#define WKUP_LEVEL_HIGH (1 << WKUP_LVL_POL_SHIFT) +#define WKUP_ENABLE (1 << WKUP_EN_SHIFT) +#define WKUP_DISABLE (0 << WKUP_EN_SHIFT) +#define WKUP_ON_LEVEL (1 << WKUP_LVL_EN_SHIFT) +#define WKUP_ON_EDGE (0 << WKUP_LVL_EN_SHIFT) +#define WKUP_LEVEL_LOW (0 << WKUP_LVL_POL_SHIFT) +#define WKUP_LEVEL_HIGH (1 << WKUP_LVL_POL_SHIFT) /* Only these macros are expected be used directly in device tree files */ #define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) @@ -82,14 +82,14 @@ #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT) #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT) -#define PIN_DRIVE_STRENGTH_NOMINAL (0 << DRV_STR_SHIFT) -#define PIN_DRIVE_STRENGTH_SLOW (1 << DRV_STR_SHIFT) -#define PIN_DRIVE_STRENGTH_FAST (2 << DRV_STR_SHIFT) +#define PIN_DRIVE_STRENGTH_NOMINAL (0 << DRV_STR_SHIFT) +#define PIN_DRIVE_STRENGTH_SLOW (1 << DRV_STR_SHIFT) +#define PIN_DRIVE_STRENGTH_FAST (2 << DRV_STR_SHIFT) #define PIN_DS_FORCE_DISABLE (0 << FORCE_DS_EN_SHIFT) #define PIN_DS_FORCE_ENABLE (1 << FORCE_DS_EN_SHIFT) -#define PIN_DS_ISO_OVERRIDE_DISABLE (0 << ISO_OVERRIDE_EN_SHIFT) -#define PIN_DS_ISO_OVERRIDE_ENABLE (1 << ISO_OVERRIDE_EN_SHIFT) +#define PIN_DS_ISO_OVERRIDE_DISABLE (0 << ISO_OVERRIDE_EN_SHIFT) +#define PIN_DS_ISO_OVERRIDE_ENABLE (1 << ISO_OVERRIDE_EN_SHIFT) #define PIN_DS_OUT_ENABLE (0 << DS_OUT_DIS_SHIFT) #define PIN_DS_OUT_DISABLE (1 << DS_OUT_DIS_SHIFT) #define PIN_DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT) @@ -98,18 +98,18 @@ #define PIN_DS_PULLUD_DISABLE (1 << DS_PULLUD_EN_SHIFT) #define PIN_DS_PULL_DOWN (0 << DS_PULLTYPE_SEL_SHIFT) #define PIN_DS_PULL_UP (1 << DS_PULLTYPE_SEL_SHIFT) -#define PIN_DS_ISO_BYPASS (1 << ISO_BYPASS_EN_SHIFT) -#define PIN_DS_ISO_BYPASS_DISABLE (0 << ISO_BYPASS_EN_SHIFT) +#define PIN_DS_ISO_BYPASS (1 << ISO_BYPASS_EN_SHIFT) +#define PIN_DS_ISO_BYPASS_DISABLE (0 << ISO_BYPASS_EN_SHIFT) -#define PIN_DS_OUTPUT_LOW (DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO) -#define PIN_DS_OUTPUT_HIGH (DS_INPUT_DISABLE | DS_OUT_VALUE_ONE) -#define PIN_DS_INPUT (DS_INPUT_EN | DS_PULL_DISABLE) -#define PIN_DS_INPUT_PULLUP (DS_INPUT_EN | DS_PULL_UP) -#define PIN_DS_INPUT_PULLDOWN (DS_INPUT_EN | DS_PULL_DOWN) +#define PIN_DS_OUTPUT_LOW (DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO) +#define PIN_DS_OUTPUT_HIGH (DS_INPUT_DISABLE | DS_OUT_VALUE_ONE) +#define PIN_DS_INPUT (DS_INPUT_EN | DS_PULL_DISABLE) +#define PIN_DS_INPUT_PULLUP (DS_INPUT_EN | DS_PULL_UP) +#define PIN_DS_INPUT_PULLDOWN (DS_INPUT_EN | DS_PULL_DOWN) -#define PIN_WKUP_EN_LEVEL_LOW (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW) -#define PIN_WKUP_EN_LEVEL_HIGH (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH) -#define PIN_WKUP_EN (WKUP_ENABLE | WKUP_ON_EDGE) +#define PIN_WKUP_EN_LEVEL_LOW (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW) +#define PIN_WKUP_EN_LEVEL_HIGH (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH) +#define PIN_WKUP_EN (WKUP_ENABLE | WKUP_ON_EDGE) /* Default mux configuration for gpio-ranges to use with pinctrl */ #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7)