ASoC: TWL6040: Fix playback with 19.2 Mhz MCLK

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When using MCLK is configured for 19.2 Mhz, clock slicer should be
enabled and HPPLL should be bypassed in clock path.

Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

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Jorge Eduardo Candelaria 2010-05-20 17:53:07 -05:00 • committed by Liam Girdwood

parent ad8332c130

commit 44ebaa5de1

1 changed files with 1 additions and 1 deletions

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sound/soc/codecs/twl6040.c

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