riscv: misaligned: enable IRQs while handling misaligned accesses

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We can safely reenable IRQs if coming from userspace. This allows to
access user memory that could potentially trigger a page fault.

Fixes: b686ecdeac ("riscv: misaligned: Restrict user access to kernel memory")
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250422162324.956065-3-cleger@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>

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Clément Léger 2025-04-22 18:23:09 +02:00 • committed by Alexandre Ghiti

parent fd94de9f9e

commit 453805f0a2

1 changed files with 8 additions and 4 deletions

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arch/riscv/kernel/traps.c

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