clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

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The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>

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Philipp Zabel 2015-11-30 22:07:53 +01:00

parent 06445994fe

commit 4585945bf1

2 changed files with 7 additions and 1 deletions

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include/dt-bindings/clock/mt8173-clk.h

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