drm/msm/a6xx: Append SEL regs to dyn pwrup reglist

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This is needed so that SEL reg values are restored on exit from IFPC.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/728218/
Message-ID: <20260526145137.160554-16-robin.clark@oss.qualcomm.com>

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Rob Clark 2026-05-26 07:50:49 -07:00

parent d4939b77c1

commit 45d4a295b3

3 changed files with 89 additions and 7 deletions

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84

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

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11

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

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1

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

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