MIPS: mm: c-r4k: Flush scache to avoid cache aliases

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There is a chance for the secondary cache to have memory
aliases. This can happen if the bootloader is in a non-EVA mode
(or even in EVA mode but with different mapping from the kernel)
and the kernel switching to EVA afterwards. It's best to flush
the icache to avoid having the secondary CPUs fetching stale
data from it.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

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Leonid Yegoshin 2014-01-21 09:48:48 +00:00 • committed by Ralf Baechle

parent 80ca69f40f

commit 4676f9359f

1 changed files with 11 additions and 0 deletions

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arch/mips/mm/c-r4k.c

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