ARM: BCM63XX: add BCM63138 minimal Device Tree

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Add a very minimalistic BCM63138 Device Tree include file which
describes the BCM63138 SoC with only the basic set of required
peripherals:

- Cortex A9 CPUs
- ARM GIC
- ARM SCU
- PL310 Level-2 cache controller
- ARM TWD & Global timers
- ARM TWD watchdog
- legacy MIPS bus (UBUS)
- BCM6345-style UARTs (disabled by default)

Since the PL310 L2 cache controller does not come out of reset with
correct default values, we need to override the 'cache-sets' and
'cache-size' properties to get its geometry right.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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Florian Fainelli 2014-02-20 16:11:28 -08:00

parent b51312bebf

commit 46d4bca044

1 changed files with 134 additions and 0 deletions

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arch/arm/boot/dts/bcm63138.dtsi

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