PCI: cadence: Retrain Link to work around Gen2 training defect

Browse source

Cadence controller will not initiate autonomous speed change if strapped
as Gen2. The Retrain Link bit is set as quirk to enable this speed change.

Link: https://lore.kernel.org/r/20210209144622.26683-3-nadeem@cadence.com
Signed-off-by: Nadeem Athani <nadeem@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

...

This commit is contained in:

Nadeem Athani 2021-02-09 15:46:21 +01:00 • committed by Lorenzo Pieralisi

parent 7c53f6b671

commit 4740b969aa

3 changed files with 76 additions and 19 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

3

drivers/pci/controller/cadence/pci-j721e.c

View file

81

drivers/pci/controller/cadence/pcie-cadence-host.c

View file

11

drivers/pci/controller/cadence/pcie-cadence.h

View file