ARM: LPAE: accomodate >32-bit addresses for page table base

Browse source

This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems.  This allows for up to
38-bit physical addresses.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Subash Patel <subash.rp@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

...

This commit is contained in:

Cyril Chemparathy 2012-07-21 15:55:04 -04:00 • committed by Will Deacon

parent a7fbc0d62a

commit 4756dcbfd3

4 changed files with 37 additions and 8 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

16

arch/arm/include/asm/memory.h

View file

10

arch/arm/kernel/head.S

View file

11

arch/arm/kernel/smp.c

View file

8

arch/arm/mm/proc-v7-3level.S

View file