arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC

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The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.

The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4

Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

...

This commit is contained in:

Dinh Nguyen 2014-09-04 16:45:56 -05:00

parent c1ad85d772

commit 475dc86d08

3 changed files with 423 additions and 0 deletions

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1

arch/arm/boot/dts/Makefile

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374

arch/arm/boot/dts/socfpga_arria10.dtsi

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48

arch/arm/boot/dts/socfpga_arria10_socdk.dts Executable file

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