drm/amd/display: Add trigger FIFO resync path for DCN35

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[Why]
FIFO error can occur if we don't trigger a DISPCLK change after
touching K1/K2 dividers. For 4k144 eDP + hotplug of USB-C DP display
we see FIFO underflow.

[How]
We have the path to trigger the resync as the workaround in
DCN314/DCN32, it just needs to be ported over to DCN35.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Nicholas Kazlauskas 2024-04-16 11:24:05 -04:00 • committed by Alex Deucher

parent 9ba971b253

commit 47745acc5e

2 changed files with 12 additions and 0 deletions

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10

drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c

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2

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

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