ARM: KVM: add missing dsb before invalidating Stage-2 TLBs

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When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.

For this purpose, add a dsb instruction to __kvm_tlb_flush_vmid_ipa
before doing the TLB invalidation itself.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>

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Marc Zyngier 2013-06-21 13:08:47 +01:00 • committed by Christoffer Dall

parent 6a077e4ab9

commit 479c5ae2f8

1 changed files with 1 additions and 0 deletions

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arch/arm/kvm/interrupts.S

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