drm/amd/display: Program meta addresses correctly

Browse source

[Why]
When forcing 3D mode in DAL, we set the right address to be the same as the
left address. We need to do the same for the meta addresses.

[How]
Program right meta to be same as left meta.

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Alvin Lee 2020-09-25 12:24:48 -04:00 • committed by Alex Deucher

parent b98ab70e74

commit 480c5b8ff8

2 changed files with 4 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

2

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

View file

2

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

View file