drm/amdgpu/swsmu/smu12: fix force clock handling for mclk

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The state array is in the reverse order compared to other asics
(high to low rather than low to high).

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1313
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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This commit is contained in:

Alex Deucher 2020-09-28 14:16:25 -04:00

parent 808ec542c0

commit 485d531c69

1 changed files with 5 additions and 3 deletions

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8

drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c

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