dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma

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If the hardware is configured for Scatter Gather(SG) mode,
and hardware is idle, in the control register SG mode bit
must be set to a 0 then back to 1 by the software, to force
the CDMA SG engine to use a new value written to the CURDESC_PNTR
register, failure to do so could result errors from the dmaengine.

This patch updates the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

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Kedareswara rao Appana 2018-01-03 12:12:09 +05:30 • committed by Vinod Koul

parent 3093186898

commit 48c62fb051

1 changed files with 10 additions and 0 deletions

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drivers/dma/xilinx/xilinx_dma.c

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