clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change

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This patch utilizes the new PLL clk notifier to gate then ungate the
PLL CPU clock after rate changes. This should prevent any system hangs
resulting from cpufreq changes to the clk.

Reported-by: Ondrej Jirman <megous@megous.com>
Fixes: 0577e4853b ("clk: sunxi-ng: Add H3 clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>

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Chen-Yu Tsai 2017-07-23 18:27:44 +08:00

parent 1d42460a49

commit 48d5eb619c

1 changed files with 11 additions and 0 deletions

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drivers/clk/sunxi-ng/ccu-sun8i-h3.c

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