drm/i915: Fix the VDSC_PW2 power domain enum value

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The POWER_DOMAIN_TRANSCODER() macro depends on the
POWER_DOMAIN_TRANSCODER_A/B .. DSI_A/C enum values to be consecutive,
move POWER_DOMAIN_TRANSCODER_VDSC_PW2 after these to ensure this. The
wrong order didn't cause a problem, since the DSI_A/C domains are in
always-on power wells on all relevant platforms. The same power well
ends up being enabled/disabled when the VDSC_PW2 domain is selected
incorrectly.

While at it add a code comment about enum values that need to stay
consecutive.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220222165137.1004194-2-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2022-02-22 18:51:30 +02:00

parent 5c190e5394

commit 492c1ae2f2

2 changed files with 11 additions and 4 deletions

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4

drivers/gpu/drm/i915/display/intel_display_power.c

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11

drivers/gpu/drm/i915/display/intel_display_power.h

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