Update for meson clocks targeted at v4.21

- Add GX video clocks - Switch to HHI syscon for meson8b - Fix meson8b cpu clock - Add support for meson8b CPU scaling - Add Meson8b CPU post-dividers clocks -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJb+AvnAAoJEHfc29rIyEnRhgEP/3Q4h0eBkObRikKUUFs104vb Yd+n2AWNaM54CxMOVJancOxRZGo5/BHV+TT0718sIjEZDzMhm88kkVXNSUMegGXz 0Xt1T10clMlftzqCos6Be6Rnd9gUl2xUp0urZw965DBIGkelrV2CSb+FdRJb9OWE CutcdQuSrF+nf3qe3W9upC7vbcjOHT5KOZfFdLpjgFZI2+5X+4SyErW1PlSJHziR NpEklJxL0T2FdKYu/rPm245FFGd04CV4b21YVVclF/yEtERO6cVIfVVSfvr94Tz4 hOiRoM1Bb0GBGjovubKCFrEbtZAI7CgdPOLqvyYsFJNpbAKTCeCQahB9SO4pJ6X+ xV9KOylnvmT5I8fTvJ+6/G2KsepuR/9WEzyCaP1JXwRVBd5OwyLjKTzrSExabhnp 2Njg8krfcxZpqRzq9gGu6FHv9edj30K+N/zxmBa0aW9VCb7g29m8r0GTUAB4pXIM fWBCBGt4Gay5mXQZcFvyAhkeh8XKYVcd26Z+68E48UhXUCcccuFdLU48eCKdG9vx ewEUNLsu+G44MQjZrB4wtw04mv3hALjUabnZzWoTDfVFLNJxYSVjXThsq5eZ/B8a 4CBvWfJ0tv4jpW6cp6Xqp2fWIZKRgU8841GPZcK49gyZ9CLJFdi8IhsLYAQfO+5E O0R0FwyO0IjJCazScyJj =JJGs -----END PGP SIGNATURE----- Merge tag 'meson-clk-4.21-1' of https://github.com/BayLibre/clk-meson into clk-meson Pull amlogic meson clk driver updates from Neil Armstrong: - Add GX video clocks - Switch to HHI syscon for meson8b - Fix meson8b cpu clock - Add support for meson8b CPU scaling - Add Meson8b CPU post-dividers clocks * tag 'meson-clk-4.21-1' of https://github.com/BayLibre/clk-meson: clk: meson: meson8b: add the CPU clock post divider clocks clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3 clk: meson: clk-regmap: add read-only gate ops clk: meson: meson8b: allow changing the CPU clock tree clk: meson: meson8b: run from the XTAL when changing the CPU frequency clk: meson: meson8b: add support for more M/N values in sys_pll clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel clk: meson: clk-pll: check if the clock is already enabled clk: meson: meson8b: fix the width of the cpu_scale_div clock clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table clk: meson: meson8b: use the HHI syscon if available dt-bindings: clock: meson8b: use the registers from the HHI syscon clk: meson-gxbb: Add video clocks dt-bindings: clk: meson-gxbb: Add Video clock bindings clk: meson-gxbb: Fix HDMI PLL for GXL SoCs clk: meson: Add vid_pll divider driver dt-bindings: clock: meson8b: export the CPU post dividers
2026-11-13 07:31:07 +00:00 · 2018-12-03 11:47:04 -08:00 · 2018-12-03 11:47:04 -08:00 · 4946166e46
commit 4946166e46
parent 651022382c a7d19b05ce
13 changed files with 1319 additions and 49 deletions
--- a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
--- a/drivers/clk/meson/Makefile
+++ b/drivers/clk/meson/Makefile
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
--- a/drivers/clk/meson/clk-regmap.c
+++ b/drivers/clk/meson/clk-regmap.c
--- a/drivers/clk/meson/clk-regmap.h
+++ b/drivers/clk/meson/clk-regmap.h
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
--- a/drivers/clk/meson/meson8b.h
+++ b/drivers/clk/meson/meson8b.h
--- a/drivers/clk/meson/vid-pll-div.c
+++ b/drivers/clk/meson/vid-pll-div.c
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
--- a/include/dt-bindings/clock/meson8b-clkc.h
+++ b/include/dt-bindings/clock/meson8b-clkc.h