spi: cadence: Add usleep_range() for cdns_spi_fill_tx_fifo()

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In case of xspi work in busy condition, may send bytes failed.
once something wrong, spi controller did't work any more

My test found this situation appear in both of read/write process.
so when TX FIFO is full, add one byte delay before send data;

Signed-off-by: sxauwsk <sxauwsk@163.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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sxauwsk 2018-04-17 04:01:27 +08:00 • committed by Mark Brown

parent 10b4640833

commit 49530e6411

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drivers/spi/spi-cadence.c

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